Electronics > Beginners

silicon photolithography

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carl0s:
I understand how silicon dies are made from wafers, the photolithography stuff, the crystal drawing, lead wires, packaging etc.. but all the nice vid-jeos I've watched seem to skip over the subject of how a 'picture' on a piece of silicon can be the difference between all the various electronic components. Is it just down to the shape/pattern that is put on the silicon? does current just jump gaps and shapes differently or something?

oh, there is that N/P doping thing that I've tried to read about but still don't understand. Is that key to it?

I've just ordered some bare dies to look at under the microscope. It would be nice to get a deeper understanding of what is what, based on appearance. I understand some are masked, and they are multi layered too (ouch).

carl0s:

--- Quote from: blueskull on October 16, 2019, 09:58:03 pm ---Every time we do lithography, we want to mask something. Once some parts are masked, we can pattern the exposed rest with etching, ion implanting, deposition or other processes.
Then, the mask is removed, leaving the remaining pattern after processing. This process is repeated to build up layers in an IC.

--- End quote ---

So the lithography is just providing the mask for the next layer, which could be ion implanting, deposition (that's the n or p doping that I will try again to read and understand?), and/or other processes ?

So basically there's a lots of 'other processes' that the vidjeos I have been watch just skipped over?

carl0s:
I was hoping I might be the first to attempt to make a silicon chip (one or two transistors ?) at home, some time in the next 20 years (time to retire... would anybody else be bothering?)

Anyway I came across this, so I'm well behind. Nice. I shall just follow:

james_s:
About 10 years ago I went to the bay area maker faire and saw Jeri Ellesworth demonstrating some simple ICs she made at home so I'm afraid you're a bit too late to that party. It's still a rather exclusive club though.

T3sl4co1l:
AFAIK, Jeri and Sam are the only two on the internet who have succeeded. :-+

The comment about "does current just jump gaps and shapes differently or something?" is kinda-sorta right, when the current is in a semiconductor.  Over small enough distance scales (< 10um or so in Si), the charge carriers diffuse about and anywhere they get sucked into a junction, you have a current flow.  When this is done over a short distance (~1um) between junctions, and over a wide area (a flat diffusion), it turns out most of the current drawn from the thin (~1um) layer actually diffuses straight on through to the other junction.  Whammo, you've got a BJT.

BJTs are as important for their unintentional behavior, too -- in logic devices, ESD diodes typically have some current gain between neighboring pins, or to VDD or VSS.  This is usually pretty small (I've found the hFE of parasitic transistors in the 74HC family is typically ~0.5 to VDD and ~0.03 between adjacent pins -- low, but nonzero!), but the pairings can still be triggered into SCR latchup (at >100mA for 74HC).

MOSFETs are, I think, less mysterious, in that the channel starts depleted or reverse-biased and a minute surface layer (~100nm) is teased into being conductive by an applied electric field.  When this surface layer is applied between two diffusions, whammo, they conduct!  They're also easier to make in some respects (fewer steps, and less fiddly?), but also harder in others (high purity is required to avoid surface states and mobile ions trapped in oxides).

Tim

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