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| Simple Audio Amplifier |
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| braddrew0:
Small update - it works! :D Thanks to those who helped me with this project. You might notice from the DC readout that I have about 44mV DC offset... this seems quite high, is anyone able to shed light on why it's likely this much and/or potential fixes? Lessons learnt for me: * Drawing a max of about 500mA per channel from my benchtop supply (so ~1A total into 8 ohm = 8 watts) the speaker is about as loud as I'd ever want to have it... * Running at this power setting for about 15 minutes, the parts didn't even feel warm... * Don't use DPAK SMD power resistors without an oven! Seriously - these were near impossible for me to hand solder, even with a bucket of flux. Also I misread the pinout from the spec sheet - the two 'legs' of the DPAK are the resistor legs, the big pad is just for cooling. Next time will be through hole for both the inline and filter resistors (ie the high power ones). Thanks again! :) |
| Kleinstein:
The DC offset can have different origins, like a mismatch in R2 and R5 (emitter resistors at the input). Q1 to Q5 and Q2 to Q4 VBE matching can also be a factor, good for a few 10 mV. Another point is that normally R10 and R1 should be the same value to avoid an offset from the input bias current (increasing R1 to 22 K should be easy). Input Bias current should be on the order of 1-3 µA so a 12 K mismatch would cause some 10-35 mV of offset. A point to fix adjust the offset would be at R2/R5 or R3/R6. So something like an extra resistor in parallel to R3 or R6 should be able to adjust the offset. |
| magic:
Another potential source of offset and maybe some ppm-level nonlinearity is the difference (if any) between base currents of Q4+Q2 and Q8. Collector currents of Q2 and Q4 are equal. Q5 supplies base current to Q4 and Q2 in addition to Q4 collector current, Q1 supplies base current to Q8 in addition to Q2 collector current. Therefore Q1/Q5 currents may become unbalanced if Q4+Q2 and Q8 base currents aren't equal and a permanent offset voltage will develop to produce that imbalance. Self failed to notice this problem despite all his obsession with current mirrors ;) Supposedly the latest 6th edition has been corrected. |
| braddrew0:
That's great info, thanks! I did change R1 to match the 22k of R10, but I didn't use any form of precision resistors - they're all 1% 0805. I'll have a go at trying to balance R2/R5 and R3/R6. With regards to Q2/4 and Q8 - I actually changed out Q8 to a BC850 (with Q1 as a BC860) and left Q2/Q4 as MMBTA05. Should these transistors be matched? Thanks again! |
| magic:
No, only Q2 with Q4. Ib(Q2)+Ib(Q4) is supposed to be close to Ib(Q8). You will never get it perfect in this input stage topology because transistors aren't exactly identical, even from one production batch. You can get close by design and calculations, knowing that Ib=Ic/β and Ic of each transistor is something you design and control while β is known approximately from the datasheet. But things need to be put in perspective. Transconductance of your input stage is probably at least a few mA/V, which is a few µA/mV. So unless current imbalance exceeds a few µA, offset won't exceed 1mV. Okay, it seems I just proved it's a nothingburger unless you did something crazy like running the VAS on huge collector current using a very low-beta transistor. |
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