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Single Transistor Amplifier Design
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Mattjd:
Hi,

I'm trying to design an amplifier with the design specifications shown in the first image of the link.

Now I wanted to try a single common source amplifier. We're directed to use a specific nmos within cadence. Nmos4


I performed the simulations also shown in the imgur link to obtain the following


Considering the gain required is 10. I was going start by choosing a Q point from the graphs shown in the imgur link.

I chose, (11.112mA,2) @ Vgs = 2 as my Q point. This provides a transconductance gm of 10.621 mS. As well as...


Early voltage Va = 20.2 volts ... Va = ro*Id = 1818*11.112mA = 20.20
Channel Length modulation  lambda= 0.0495 ... lambda = 1/Va
conduction parameter Kn = 11.97 mA/V ... Kn = 2*Id/[(Vgs-Vt)^2(1+lambda*Vds)]


Additionally you can see from my Id vs Vgs graph that Vt is roughly .7 volts.


Since I chose a 4 resistor CS design, I was going to pick R1 = 300k Ohms and R2 = 200k Ohms. To calculate Rd I had planned on working backwards from this

-10 = -gm*(ro||RL||Rd)*(Rg/(Rsig+Rg)           (Rs isnt necessary bc i had planned on including by pass cap in parallel with it)...Rg = R1||R2

as I know gm, ro,RL

Once I calculated Rd, I was going to back calculate the necessary Rs value to give the proper Vgs and Vds as they're both known.

I get a negative resistance for Rd, im assuming something is wrong with my simulations OR i simply dont have a large enough gm to get the desired amplification.

I was hoping someone could point out my mistake.
Audioguru:
What is the part number of your Mosfet that has a 'typical" threshold voltage of only 0.7V? or did you design the Mosfet?
Did you know that graphs in a datasheet are only for a "typical" one but the range from minimum to maximum are wide and are written in text?
Mattjd:

--- Quote from: Audioguru on March 04, 2019, 01:19:19 am ---What is the part number of your Mosfet that has a 'typical" threshold voltage of only 0.7V? or did you design the Mosfet?
Did you know that graphs in a datasheet are only for a "typical" one but the range from minimum to maximum are wide and are written in text?

--- End quote ---

Its nmos4 in NCSU_Analog_Parts of cadence
bson:

--- Quote from: Mattjd on March 04, 2019, 12:33:29 am ----10 = -gm*(ro||RL||Rd)*(Rg/(Rsig+Rg)           (Rs isnt necessary bc i had planned on including by pass cap in parallel with it)...Rg = R1||R2

as I know gm, ro,RL

Once I calculated Rd, I was going to back calculate the necessary Rs value to give the proper Vgs and Vds as they're both known.

I get a negative resistance for Rd,

--- End quote ---
Given,
-10 = -gm*(ro||RL||Rd)*(Rg/(Rsig+Rg)

I get:
-10/(-gm*Rg/(Rsig+Rg)) = ro||RL||Rd = 1/(go + gL + gd)
gm*Rg/10(Rsig+Rg) = go + gL + gd

gd = 1/Rd = gm*Rg/10(Rsig+Rg) - 1/Ro - 1/RL

Rg = 2/(2+3) = 0.4Ω = 200k||300k = 120kΩ
Rsig = 1kΩ
RL = 500Ω
Ro = 1818Ω

1/Rd = 10.621m*0.4/10(1k+0.4) - 1/1818 - 1/500 = 0.42246

Rd = 2.37Ω

EDIT: Oh wait, Rg is 200k||300k, not a divider.  Sorry.

Yup, corrected for that I get a negative Rd also; -668Ω.
Mattjd:

--- Quote from: bson on March 04, 2019, 01:48:18 am ---
--- Quote from: Mattjd on March 04, 2019, 12:33:29 am ----10 = -gm*(ro||RL||Rd)*(Rg/(Rsig+Rg)           (Rs isnt necessary bc i had planned on including by pass cap in parallel with it)...Rg = R1||R2

as I know gm, ro,RL

Once I calculated Rd, I was going to back calculate the necessary Rs value to give the proper Vgs and Vds as they're both known.

I get a negative resistance for Rd,

--- End quote ---
Given,
-10 = -gm*(ro||RL||Rd)*(Rg/(Rsig+Rg)

I get:
-10/(-gm*Rg/(Rsig+Rg)) = ro||RL||Rd = 1/(go + gL + gd)
gm*Rg/10(Rsig+Rg) = go + gL + gd

gd = 1/Rd = gm*Rg/10(Rsig+Rg) - 1/Ro - 1/RL

Rg = 2/(2+3) = 0.4Ω
Rsig = 1kΩ
RL = 500Ω
Ro = 1818Ω

1/Rd = 10.621m*0.4/10(1k+0.4) - 1/1818 - 1/500 = 0.42246

Rd = 2.37Ω

--- End quote ---
your Rg is wrong

Rg is the parallel resistance of R1 and R2, which is 120k, so Rg/(Rsig+Rg) = 120k/121k ...approx 1, which is why that part of the gain is typically ignored when Rg is much much larger than Rsig
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