What I am trying to tell you is that this circuit is no longer a capacitive multiplier... period!
correct, but we can't change the name of the thread. also, we started wanting this to be a cap multiplier, then kept slowly changing it until it became like this. now we cannot change the name of the thread so there is that.
The linear regulator has frequency limitations because of the opamp and the capacitor you have on the gate imposes more frequency limitations exacerbating the problem.
the small capacitor (1nf) on mosfet gate plus the resistor is to ensure stability, especially the resistor.
What "big EMI filter" I see a couple of 22uF caps.
by that I meant the filtering on 12v rail + the filtering before 7805 (op-amp supply). add to them the filtering before each switcher ic.
22uf is on op-amp positive input.
Looking at your PCB artwork it looks like you are running the ground and power on traces rather than planes.
maybe that is not the final layout since we stalled for months until we settled on on, literally tens of times we changed it. I can send the project to you on private if you want to see the final stuff.
I am very worried about the impact of adding a capacitor to the control loop in your linear regulator.
the 1nf one?
As I've said several times, you will get a much better result if you just drop the idea of designing your own linear regulator and pick a chip that has a low noise specification.
I already manufactured the boards and should be ready to be finalized soon when the rest of components arrive.
I actually started doing just that and I think I still have the schematic. it was like this: Switching regulator -> LC filter -> cap multiplier -> linear regulator with caps on the output. However the cap multiplier part got us where we are now until we changed the entire thing.
Consider how the control loop works.
well, we didn't design this to be like a bench power supply or anything with vastly changing loads and so on. the load pretty much won't change as it is a retro gaming console with only one thing to do continuously.
Add the RC filter between the op amp and the gate and you get a delay between the op amp responding and the FET being driven higher.
adding that 100R is necessary for op-amp and mosfet stability, and the mosfet gate itself is capacitive. we only put 1nF to ensure more stability as I used to suffer from such particular circuits oscillating due to no cap on that place.... but that is on a linear bench psu on ltspice.
you suspect that it could output the wrong voltage if a fast change happens?
if this is the only issue in the design and it caused a problem, i can simply remove that 1nF from the board very easily.
If you want to produce a good power supply design, focus on implementing a good layout and add a section of LC filtering to the output of the switcher. That will cut the high frequency noise significantly. There should not be measurable low frequency noise after a proper linear regulator. Also read the linear regulator data sheet carefully as they often have specifications on the input and output capacitors to prevent oscillation.
trust me, we spent months on layout from datasheets and app notes... down to mm positioning of traces.
by "proper linear regulator" you mean those expensive ICs? I could buy 3~5$ one from Analog Devices but then it will cost a lot per board unlike the opamp+mosfet which is less than 0.5$ combined. I would need 2 of them for 2 rails which will be like 6-10$ per board just for 2 ICs.
I've been searching of ready-to-use switching and linear ICs for very low noise but they are all expensive as hell. I wanted to manufacture this on JLCPCB SMT service as much as possible too.
what output noise and ripple do you expect from this? how many micro\milli volts?
do you think it may not work at all? I paid a lot for these and will be disastrous if they didn't work.