Smoothing capacitor calculation

[sy]

Hello, I see on many circuits that the power rails are commonly smoothed with two or three capacitors (eg. 10uF, 1uF, 0.1uF...) to reduce ripple voltage.

To better understand how these smoothing capacitors work, I would like to ask how to calculate the capacitor values needed to achieve a certain ripple.

I believe the formula is C=I/(2*f*dv) is used to perform this calculation.

Say if I have a circuit where the voltage rails are sitting at 12V with 100mV of ripple. How would I go about calculating smoothing capacitors to bring this value down to say 10mV of ripple?

[PGPG]

I used Spice mainly to analyse supply filters. The key is to use capacitor and choke models with parasitic elements. Ideal capacitor has 0nH serial inductance (ESL) and 0mΩ serial resistance (ESR) and ideal choke has 0mΩ serial resistance and 0pF paralel capacitance. But real elements have these values not 0.
As I remember (it was about 20 years ago) i got Murata program that allowed me to get parasitic elements for their MLCC. From self resonant frequencies of choke you can get its parasitic paralel capacitor and real choke wire R is typically given in their parameters.
Two MLCC capacitors (they have small ESR - about 10mΩ) with different capacitance connected paralel have some frequency at which they resonate (because of their ESL) and their blocking functionality at this frequency is far from ideal. This problem does not occur if you connect MLCC capacitor with electrolytic one (it has high ESR). Using Spice you can see all this.

If you care of ripple than only the highest capacitor value is important. But ripple comes from charging/discharging its capacitance, but also from varying voltage drop at its serial resistance.
I like DCDC converters working in COT control scheme (see LM5017) as they react for load current change in one cycle and not in 5..10 cycles like Current mode ones). LM5017 works stable provided there is enough ripple at its output. I write about it to let you know that not always reducing ripple is what you want.
Leaving some ripple at DCDC output I then filer it using LC (or LCLC) filter (and to analyse this filters I used Spice).
0.1uF and 1uF capacitors purpose is not to reduce ripple but to reduce very high frequency noise (for analog circuit supply) and supply ns current pulses needed by digital ICs when switching state.

[MasterT]

[iMo]

From the above math it seems to me you have to use 10x larger capacitance when you want 10x smaller ripple (provided the current, the frequency and the ESR remain constant)..

Mind the ripple could theoretically include various frequency components, and the different capacitor types/materials have different filtering capabilities vs. frequency (as indicated above - the parasitic ESL, ESR, etc play a role) as well as some types (like the MLCC) have got their capacitance dependency on the DC bias (the closer the DC voltage to their max DC the smaller their capacitance). So it is a rather complex stuff..

[tunk]

That equation assumes it's an unregulated supply.
If it's a switch mode supply then I think you have to look at coils etc.