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Author Topic: Spark Gap across CMC  (Read 379 times)

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Offline sfoipgjpTopic starter

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Spark Gap across CMC
« on: March 15, 2023, 01:44:16 am »

What's the purpose of the spark-gap in this picture? I've also seen this from DERs from Power Integrations.

https://imgur.com/a/ZZdqbRQ

Hijacked a question from another website. I didn't feel like the answers were enough. I'm hoping someone will tell me more.

Thanks!

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Online T3sl4co1l

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Re: Spark Gap across CMC
« Reply #1 on: March 15, 2023, 02:08:03 am »
Presumably, to avoid breakdown of the windings during ESD or EFT.

I've seen it often enough myself, but I'm not aware of any recommendations or standards that suggest it.

Tim
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Offline sfoipgjpTopic starter

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Re: Spark Gap across CMC
« Reply #2 on: March 15, 2023, 02:20:45 am »
Thanks!

Is it safe to say to always do this? There appears to be no harm in doing it consistently. I believe it does not increase PCB expenses.
Please correct when I'm wrong.

When's the best time to do it? Complying IEC 61000-4-2 above Level 4?
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