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spi clock looks bad

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ToBeFrank:
I'm diagnosing why my SPI doesn't work at higher clock rates, and I think it is the clock signal itself. Here is a pic of what it looks like at 3MHz. What causes this and how do I correct it? The only thing on the SCK line is a 10K resistor.

jahonen:
Are you using long ground clip when measuring?

Regards,
Janne

ToBeFrank:
Wow, so I pulled a stupid. I had both probes sitting next to each other, but I only hooked up one probe. Turns out I had the ground clip from the wrong probe hooked up! Thanks for pointing me in the right direction.

Does this clock look ok at 12MHz for the SPI to work correctly?

jahonen:
It looks ok-ish, apart from relatively long rise time, but I think it should work ok. Have you checked SPI clock edge settings (CPHA & CPOL) to comply with the peripheral devices you are using? Also, check maximum clock rates, some devices have quite low maximum sclk frequency limit.

Regards,
Janne

scrat:
Since there is almost no noise on the clock, could a higher load resistance value be used, to try increasing that slope (i.e. 100k)?
Or could this just be a reason for the clock to generate more noise on the other signals?

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