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SPI Troubleshooting

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Muffins:
Hi guys,

I'm trying to get an Atmega328pb to interact with an FRAM chip. My problem is that I can't get a response from the FRAM.

The SPI has been checked and seems to be working properly. I've added an ocsilloscope screenshot with the MISO shown in green (flatline).

I am using this fram module: https://www.mikroe.com/fram-click, here is the datasheet for it: https://www.fujitsu.com/downloads/MICRO/fsa/pdf/products/memory/fram/MB85RS256A-DS501-00007-0v01-E.pdf

I don't think this is a code problem but here is what I am up to:

--- Code: ---                             
// opcodes as defined in datasheet
uint8_t writeOpcode = 0b00000010;
uint8_t readOpcode = 0b00000011;
uint8_t RDSR = 0b00000101;
uint8_t WREN = 0b00000110;
uint8_t WRDI = 0b00000100;



//chip select
PORTE &= ~(1 << 2);

// shift out opcodes
shiftOut(WREN);
shiftOut(RDSR);
// shift out blank data to read response
shiftOut(0x00);

//chip select off
PORTE |= (1 << 2);

--- End code ---
With the function doing this.

--- Code: ---void shiftOut(uint8_t shiftData)
{
SPDR1 = shiftData;
while(!(SPSR1 & (1 << SPIF1)));
}

--- End code ---
So far as I understand, I need to send the fram and opcode and data depending on the instruction. The data doesn't matter when reading, it's just to shift into the avr register.

I notice in the oscilloscope screenshot that there is a delay in between each 8 clock pulses since I am sending data 8 bits at a time. Could this be problem?

Renate:
You're using SPI mode 1, it should be mode 0.
Your data is changing on the rising edge of clock.
It should be changing on the falling edge of clock and sampling on the rising edge.

--- Code: ---SPCR = 0b010100??; // ? = speed
--- End code ---

Muffins:
Thank you for looking through it. I'll add in the changes tomorrow :-+

How did you insert code into your response?

Renate:
[co​de]Hello, I am code.[/co​de]

HwAoRrDk:
In your code you also don't need that WREN command.

WREN & WRDI are only necessary when writing data - and note that you need to precede every write command with a WREN, not just once for multiple. The write latch automatically resets upon completion of a write.

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