BJT multistage amplifier biasing questions

[prosper]

Im struggling to understand how the biasing of this amplifier works. I dont quite understand how to calculate resistors to set the dc quiescent point, and choose a gain.

My end goal is to understand how to design a circuit similar to this one, in order to achieve a dc q point of about 2.5V, and amplify a ~50mVpp input with a 10k impedance, to a maximum output of about 3.5Vpp into an 8 ohm speaker, adjustable with a pot.



I suspect may have to add an additional stage - maybe an emitter follower - at the input, but id like to do so within the overall feedback loop... but i need to understand this circuit better before i can figure that out.

[prosper]

What i can deduce so far:

This is a common emitter amplifier with an emitter follower output stage in class AB mode. Theres collector feedback provided to the input stage. Biasing must be set somehow by r2 and r3. The junction of those two resistors will be approx 0.6v, so, the ratio of the resistors should be such that this point is about there. The higher r2 is, the higher I'd expect the gain to be, but it also seems to somehow set the dc point too. R3 needs to be much smaller than r2.
Gain also seems likely to be dependent on the output impedence of my source.

I could probably figure out something that works in a simulator or on a breadboard by guess and test, but id rather derive some formulas for how this circuit works

[bob91343]

First look at the quiescent state.  The two diodes roughly match the Vbe of the output transistors and the collector currents will balance reasonably closely.  The current through the bias network needs to be controlled so that the output voltage is zero with no signal.  The way it's set up you can't control the idling current without changing the emitter resistors.

R2 and R3 do not control the bias.  They control the gain and symmetry (output voltage half the power supply).  The two diodes in series will give a drop of about 1.3 V and hopefully that's enough for the output stage to draw a bit of current.  A better setup would be to control the diode current and possibly add a resistor so that the desired idling current will flow.  The two diodes need to be thermally coupled to the output transistors so that the bias will drop as the temperature increases.

[T3sl4co1l]

Ahhh, good old 1960s tech.

You left out critical information: what's supply voltage?

Note that the output stage is class B, give or take how the diode Vf's relate to the output Vbe's.  Most diodes are lower, leaving low Iq and notable crossover distortion, even for R4 = R5 = 0.

Note that the output needs to be AC coupled just as the input is.  This will result in some "pop" in the speaker, when power is applied.

R1, and whatever load Q2/Q3 present, makes this a traditional common emitter amplifier with resistive load, so the maximum voltage gain is about 20.  R2 brings some shunt feedback as shown, both acting in parallel with R1 to lower the collector load impedance (reducing gain by brute force), and reducing the input impedance (by negative feedback).  Which reduces distortion some, and also makes it dependent on source impedance.  (Typically a series resistor is added, so that the maximum gain (at Rsrc = 0) is well defined.)

You request a gain far higher than the circuit can provide under any combination of values, so you will need to choose a different circuit.

Tim

[Ian.M]

Have a play with a LTspice sim of it.   Its operating point is significantly sensitive to Q1 h_FE (parameterized and sweepable in the sim) and to temperature.  I didn't put much effort into choosing suitable resistor values, choosing them mostly by dim and distant memories and rules of thumb, so no doubt it could be optimised a bit.

Ahhh, good old 1960s tech.

More like crappy 1960's tech.   The THD is absolutely horrible (>10%) driving a significant load, and the design is only vaguely excusable in the era when a portable transistor radio would cost you a week's wages. 

Back in the day, transformer coupling was more common, because it could give a superior performance/price ratio to a direct coupled output stage design.   A good reference book for transistor circuits from that era is the "Mullard Reference Manual Of Transistor Circuits".  Its fairly easy to find a PDF of it and is well worth a read if you are interested in the era before ICs.

[magic]

My end goal is to understand how to design a circuit similar to this one, in order to achieve a dc q point of about 2.5V, and amplify a ~50mVpp input with a 10k impedance, to a maximum output of about 3.5Vpp into an 8 ohm speaker, adjustable with a pot.

Quiescent point is easy enough: V(out) = Vbe(Q1)·(R2+R3)/R3 + Ib(Q1)·R2. Reason is, that's the point where divided output voltage will turn on Q1 and stop further rise of output voltage due to R1. For 2.5V you will probably end up with roughly R2 = 2.5·R3, but watch out for base current.

This circuit runs open loop, there's gonna be no feedback at AC. Reason is, C1 reactance isn't flat with frequency (to put it mildly), so it has to be made negligible in comparison with all the resistances over the bandwidth of interest. Then, the input signal drives the base directly, overriding feedback through R2. Feedback will only be effective at DC where C1 reactance is high. It will set the quiescent point, as above.

Considering the lack of effective feedback, all AC input voltage will appear at the base of Q1, and input impedance is simply parallel impedance of all the components present there: R3 || R2/gain || 1/gm(Q1)·β. R3 is obvious, I hope, but R2 appears lower in value because for each 1mV of input, R2 voltage changes 71mV and we all know the Ohm's law. R2 may need to be about 1MΩ and R1 400kΩ. The third term is my guess of what to expect from the transistor, and it seems to limit the transconductance you can have to about 10mA/V, if I'm right.

Gain equals gm(Q1)·(R1 || R2) (ignoring collector resistance of Q1 and the output stage), so taking gm=10mA/V we need R1||R2=70V/10mA=7kΩ, so let's take R2=7kΩ. Transconductance is gm(Q1) = Ic(Q1)/Vt, where Vt is the thermal voltage which depends on junction temperature, take 25~30mV for room temp to 70°C, so Ic must be ~0.3mA.

This puts 2.1V across R1, so supply voltage has to be in the vicinity of 5V. That being said, 2.1V is barely enough for the demanded voltage swing and will cause plenty of distortion, because R1 voltage will change a lot. This is the first big problem.

The second big problem is that such an amplifier just doesn't have enough current gain. The output stage will present β·Rload additional load on the collector in parallel with R1 and R2. This is ~1kΩ in this case and it will completely kill the gain.

However, I plugged the numbers for a bare common emitter stage into SPICE and with only minor modifications it checks out:
- base voltage roughly equals input voltage
- collector voltage is 37dB higher, but gain will never be perfect due to thermal drift
- input current is a hair higher than -80dB, indicating almost 10kΩ impedance, at least up to ~20kHz
 

But distortion in transient simulation is just terrible, as expected. The full design could perhaps be made workable, by replacing biasing diodes with emitter followers to make a diamond buffer for higher current gain and bootstrapping R1 for less distortion.

[Zero999]

There's so much distortion because the current through the amplifier transistor varies greatly and there's no negative feedback. The current gain of a BJT varies with the current, so the voltage generated across the collector load is not proportional to the change in base-emitter voltage.

Here's a solution. It's not perfect and is not completely my idea. I originally read it in Elektor magazine. I made a post about it awhile ago, with a link to the PDF, which is now broken. The idea is to minimise the change in current through Q1, the voltage amplifier, thereby minimising the distortion and maximising the gain. The voltage across R4 remains roughly 0.6V, thus Q1's emitter current remains constant. This is slightly worse in my circuit because of the loading due to Q3 & Q4. R1 to R3 bias the output at around half the supply voltage and C1 bypasses R2 & R3 to 0V, thus preventing negative feedback. The circuit has a very high open-loop gain, which is reduced by negative feedback from R8 and R9. Care needs to be taken with selection of the capacitor values, to avoid peaking and ringing at low frequencies.

https://www.eevblog.com/forum/testgear/state-of-the-art-oscilloscopes-10-years-ago/msg564344/#msg564344

[prosper]

Oh, this is all great! My vsupply is 5-6V. I think I'm a bit clearer now. I'm going to play with a few things on the breadboard.

I know this circuit isn't much use these days, other than learning, which is my goal. It'd be much easier to use an opamp or audio chip amp for any realworld imementation

Thanks so much!

[prosper]

Also, i was planning on bootstrapping the circuit (or replacing r1 with a current source) to help with gain and distortion, but i didn't want to add complexity just yet.

[Zero999]

Your power supply voltage is too low to get 3.5V peak-to-peak in to an 8 Ohm load, with such a basic circuit.

[prosper]

I found that my circuit is prone to GSM noise from nearby cellphones, and i think this one would be too. A solution i found is to bypass your feedback resistor (r2 in my circuit, r9 in the one you posted) with a small cap to provide low impedance negative feedback at high frequency ac

Thinking about it, I realize 3.5V is probably higher than i can achieve without big distortion. Max Vpp for ideal components would be around (Vsupply - 2xVbe drops) , or 5V-0.7V-0.7V = 3.6V. Realistically, 3V is probably pushing it.

I might play with a bridging configuration. A second output stage and a phase splitter somewhere in the input side... should increase my maximum output swing

[magic]

That Sziklai pair is a good idea, better than a diamond buffer in fact, because it adds current gain for both sourcing and sinking with only one transistor.

The circuit can now be rearranged to a more conventional noninverting configuration and a few components are saved in the process.

I added a few components again to implement collector load bootstrapping. It's not a great improvement because 1kΩ impedance isn't much less than the 1~1.5kΩ of the output stage which still remains, but it seems to allow the circuit to work somewhat passably at 5.5~6V, even down to low frequencies.

I could show you a rail to rail stage which I think could be made to work in discrete, but it's four transistors just for the output and still only two of them are contributing current gain.

[prosper]

Oh, that's fantastic! And I even understand it, too - even better haha!