What will happen if Vgs is ‘too negative’ on a p-channel MOSFET?

[Darkwing]

Hi folks!

I’m posting this in ‘Beginners’, because I’m sure it’s kind of a beginner question.

I wonder: what will happen, if the gate-to-source voltage on a p-channel MOSFET will exceed its absolte maximum given in the data sheet? (I noticed, I could also ask this question the other way around, regarding n-channel MOSFETs.)

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Given this MOSFET: IRF9510, like almost all MOSFETs I’ve seen so far, there is a maximum Vgs of ±20V stated. What will happen if I apply more?

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A little bit of background:
I’m planning to switch let’s say 48V with such a p-channel MOSFET. For turning it off, I of course have to pull up the gate up to these 48V. When then turning it on, I need to lower the gate voltage. But when I now ‘lower’ it by pulling it simply to GND, I suppose I have produced a Vgs of -48V, right?

Is this harmful/deadly for the MOSFET? Why? (Physicists answer expected. )
_{(Or am I maybe totally on the wrong track here?)}


Thank y’all very much in advance!
Darkwing! 

[EEVPiobee]

A little bit of background:
I’m planning to switch let’s say 48?V with such a p-channel MOSFET. For turning it off, I of course have to pull up the gate up to these 48?V. When then turning it on, I need to lower the gate voltage. But when I now ‘lower’ it by pulling it simply to GND, I suppose I have produced a Vgs of ?48?V, right?

Unfortunately, I cannot awnser your full question, but...

Why don't you use a simple voltage divider (only on the mosfet's gate) to apply voltage within range? Let's say 100k-100k to get it to 24 volts or 10k-30k for 12v (10k on the GND side..)
Since Mosfets are voltage controlled and not current controlled like other transistors, and they simply act like switches, you shouldn't have any problem doing so...


if you want to try blowing one up, welll go ahead and post a video

(Note: do as your own risk, wear glasses, safety first, legal advises, blablabla... You know it)

[edavid]

Hi folks!
I wonder: what will happen, if the gate-to-source voltage on a p-channel MOSFET will exceed its absolte maximum given in the data sheet?

The gate insulation will be punctured, and the MOSFET will no longer work

It is common to prevent this by using a series resistor, and a zener diode between the gate and source.

[AndyC_772]

Exceeding Vgs risks breakdown of the gate oxide layer, which is very thin and prone to damage. Don't do it.

You're quite right that pulling the gate to GND will result in excessive Vgs. It's easy to overlook the fact that, even in cases where the nominal supply voltage is within the Vgs spec for the MOSFET, any spikes and noise on the supply will appear across the gate oxide too, so protecting it is often a good idea.

I often use a potential divider between the supply, the gate, and the device pulling the gate to GND for just this reason.

[BravoV]

Hi folks!
I wonder: what will happen, if ... <put what ever you read in datasheet> ... exceed its absolte maximum given in the data sheet?

Changed a bit at your question above. 

Just remember, tips on reading a datasheet, the words "absolute max rating" means the thing will damage if it crossed that limit, as simple as that. 

[free_electron]

you bull kill the mosfet. the gate -s source is an isolation barrier. go over 20 volt and it can flash over, destroying the mosfet.

[Darkwing]

Ok, thanks @all for the quick feedback! It helped me a lot.
I’m already planning to implement a zener/resistor voltage stabilizer to not pull down to ground but something more ‘healthy’ in between.


Additionally can you provide some tips for putting ‘beneficial capacitors’ somewhere around the MOSFET? (Ok, maybe that’s worth another thread… ) I’m asking because voltage spikes where mentioned. What’s best practice to get around them?


Thanks!

[T3sl4co1l]

Actually in practical terms...

Absolutely nothing will happen.

Maybe.  Most often, FETs of that range actually die in the 80V range.

BUT, you aren't guaranteed to meet specs anymore.  The V-I characteristics might be different up there (in particular, among IGBTs, you might discover latching behavior in supposedly "latch-proof" types!), you might cause soft damage (although usually, if the gate pops at all, you'll know it..), and who knows, maybe the gate actually fails at 21V because you got an unlucky one.

What you are guaranteed is, if you keep the voltage within limits, you'll be happy.

Tim

[CZavatson]

Actually in practical terms...

Absolutely nothing will happen.

Maybe.  Most often, FETs of that range actually die in the 80V range.

BUT, you aren't guaranteed to meet specs anymore.  The V-I characteristics might be different up there (in particular, among IGBTs, you might discover latching behavior in supposedly "latch-proof" types!), you might cause soft damage (although usually, if the gate pops at all, you'll know it..), and who knows, maybe the gate actually fails at 21V because you got an unlucky one.

What you are guaranteed is, if you keep the voltage within limits, you'll be happy.

Tim

This is very interesting.  It looks like I have been pulling -32V on a -20 Vgs FET Gate without realizing it.  Didn't think to check the circuit diagram as the circuit had previously only been operated below 13V. Vgs limit was not a concern then.
In exceeding the Vgs limit of +/-20V by 12V, I would have expected an immediate failure.
The FET is the Vishay
SUM110P04-05

[danadak]

Keep in mind power MOSFETs have high gate C, so using a V divider at
gate input complicates the turnon / turnoff speed of MOSFET, eg. the
effectiveness of the gate drive circuit.

Its simply best, whenever possible, to get a part with parameters that
meet the design.


Regards, Dana.

[batteksystem]

Keep in mind power MOSFETs have high gate C, so using a V divider at
gate input complicates the turnon / turnoff speed of MOSFET, eg. the
effectiveness of the gate drive circuit.

Its simply best, whenever possible, to get a part with parameters that
meet the design.


Regards, Dana.

Alternatively, use a zener to claim the exceeding voltage, but you need to pay attention to the rating.

[CZavatson]

Keep in mind power MOSFETs have high gate C, so using a V divider at
gate input complicates the turnon / turnoff speed of MOSFET, eg. the
effectiveness of the gate drive circuit.

Its simply best, whenever possible, to get a part with parameters that
meet the design.


Regards, Dana.

Thanks for the heads up on high C.  As luck would have it, the V divider is made up of low R resistors (1k) for unrelated reasons.  This makes the time constant very, very small.

[CZavatson]

Keep in mind power MOSFETs have high gate C, so using a V divider at
gate input complicates the turnon / turnoff speed of MOSFET, eg. the
effectiveness of the gate drive circuit.

Its simply best, whenever possible, to get a part with parameters that
meet the design.


Regards, Dana.

Alternatively, use a zener to claim the exceeding voltage, but you need to pay attention to the rating.

Another good option to consider.  Voltage divider ended up working out ok

[jpanhalt]

@Post#7

Be sure to consider the common failure mode for the zener you use.  Leaded ones often fail shorted.  There is a fair bit about the failure mode(s) on the Internet.

John