The importance of de-coupling.

[Kibi]

De-coupling is often "a potential trap for young players".
As some of you may know, I got my new 'scope the other day and as I was fiddling around with it, I thought I'd put this little demonstration together.
I have built a simple bog standard astable multivibrator using a 555 timer, oscillating at around just 6.5 KHz. In one instance I have omitted the 100nF de-coupling capacitor across the chip's supply lines and in the other I have included it.

Without de-coupling.





Notice the nasty overshoot and oscillations.


With de-coupling.





Almost no overshoot, and just a 500ns dip before recovering to the peak of the square wave.

At the cost of just a 100nF ceramic capacitor located close to the supply lines of the device, a lot of trouble can be avoided.
It doesn't matter how good you think you power supply is, you MUST employ de-coupling in your circuits. This was a mere 6.5KHz signal, imagine what would happen in the MHz range. Of course, you wouldn't rely on a 555 timer as your clock source in the MHz range, but this is just a demonstration of what can happen.

[IanB]

Mike "Electric Stuff" has a neat demo of this on YouTube:

[Kibi]

Thanks Ian / Mike for the very practical example. This just re-enforces the importance. A "young player" without a 'scope may not be able to understand why his / her circuit is not behaving according to design. The practical youtube example coupled (excuse the pun) with the 'scope readings should explain the importance of de-coupling.
If Mike had de-coupled each device with a capacitor close to it's supply lines then he'd have achieved a result much closer to the design.

[ejeffrey]

Yeah.  You know how Dave always says the first rule of troubleshooting is 'thou shalt measure voltages'? If you have a scope, put away your DMM and the first thing you should do is measure the supply voltages with a scope probe.  You get a 2-for-1 checking both the DC voltage and the ripple waveform.

[Kibi]

Ye, he is correct - again... No sort of DMM is going to detect an almost 2v overshoot of 2v for 100ns above the supply lines. If you were using classic TTL devices a 2v overshoot on the 5v supply lines or indeed a 2v overshoot (in my example) lasting a mere 100ns to their inputs is enough to destroy them over a short period of time.

[EEVblog]

Nice work.
Don't forget probing!
When looking at the fidelity of waveform edges like that you really need to ditch the ground clip lead and use that mysterious short springy thing that came with your probe 

Dave.

[deephaven]

I remember years ago I had made a counter with some TTL and, just for fun, tried it without any decoupling. The circuit didn't produce any output at all, I was amazed. Added one 100n and it worked as it should. So it's just as important for digital circuits as it is for analogue.

[ejeffrey]

In some ways it is more important for digital circuits.  What you are battling with decoupling caps is stray inductance.  The inductance comes from many sources: wiring and PCB traces, capacitor ESL, and the voltage regulator itself has an inductive output impedance (capacitance in its feedback network gets 'inverted' to act like an inductance).  This means that what kills you is dI/dt.  High speed CMOS logic like 74AC series draw no current in the steady state, but can draw an enormous current while switching as they have to charge up the capacitance of the PCB trace and the input capacitance of the gate it is driving.

Say you are driving a 20 picofarad capacitor with a 5 volt logic gate that has a transition time of 2 ns.  That is about a 250 MHz frequency, so maximum dI/dt is about (5 volt * 20 picofarad * (2*pi*250 MHz)^2) or about 100 MEGAamps per second.  A 10 nanohenry inductance will generate a voltage bounce of 1.2 volts.

Now imagine that you have a device with multiple outputs like a hex inverter and all the outputs flip at once.  God help you if you have a fast CPLD or FPGA with dozens or hundreds of output pins and they all go 0-->1 on the same clock cycle.  This is one reason that the absurdly high pincount devices like CPUs and FPGAs  may have nearly half their pins dedicated to power and ground.  Even with the supply properly decoupled, the inductance of the device pins and the bonding wires is too great.

So while digital circuits have intrinsic noise resistance, the power supply transients they create can be much, much worse.  The big exception to this are logic families like ECL/PECL and current mode logic where the supply current is the same (and high) in both logic states.

This is why mixed signal design is the most challenging and interesting aspect of electronics -- you have to get the analog signal paths that are very sensitive to interference to play nice with digital logic that is like a giant brass band playing next door.

[Flapjackbatter]

It helps so much to have it displayed graphically.
Ok. So a capacitor across the input rails like that is called a decoupling capacitor.
What is it called when you use a capacitor forexample between the output of an amplifier and the speaker, to only let the AC through ? Is this called a coupling capacitor ?

[IanB]

What is it called when you use a capacitor forexample between the output of an amplifier and the speaker, to only let the AC through ? Is this called a coupling capacitor ?

I believe that is called a DC blocking capacitor.

[Zero999]

Did you have a 10nF capacitor bettween pin 5 and 0V?

[Kibi]

Did you have a 10nF capacitor bettween pin 5 and 0V?

I had a 100nF between pin 5 and ground.