Author Topic: The mess of FPGA development  (Read 5297 times)

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Offline ArzneiTopic starter

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The mess of FPGA development
« on: March 27, 2019, 05:50:22 pm »
I am starting to think I am crazy here. Is it just me or is the toolchain situation for FPGAs severely f*ucked up? I confess: I am a total newbie, just want to get my first insights to the FPGA world and pulled a simple FPGA breakout board (miniSpartan3) from my electronics box (well I bought that one a few years ago but life happened and now here I am with a need for it).

So the FPGA is a Xilinx Spartan 3A - I go to the Xilinx website, first impressions:

1) The fancy new design suite doesn't support the older devices like the spartan 3 (and I'm not even sure there's a free version of it)

2) So I go to the "ISE Design Suite", of which the newest version only supports Spartan 6.

3) I have to download version 10 of it which is from 2008.

4) It crashes on start-up, so I have to create some magic registry keys for it to even start

5) It doesn't support the footprint I have, so I need to get a service pack. Which won't install for the first 2 trys but magically work on the third try.

6) Now it somewhat runs but every half an hour or so it just crashes anyways. No way found to circumvent that so far.

I am sorry if this is a bit of a rant. I'm just really frustrated. Like, how do you guys who work on FPGAs for a living even stand this? I get this is a rather old FPGA - but it is still in production, how can there not be an up to date way to program it?

Is there any alternative to this whole mess? Like can I just use an editor of my choice to write up some VHDL and only use the xilinx tools to create the bitstream I need? How would I go about that if possible?
 

Offline agehall

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Re: The mess of FPGA development
« Reply #1 on: March 27, 2019, 05:55:36 pm »
No, if you want to use old FPGAs, I think the story is pretty much the same for all the vendors.
 

Offline 0culus

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Re: The mess of FPGA development
« Reply #2 on: March 27, 2019, 06:15:40 pm »
I recommend looking into the cost-effective boards offered by Digilent. They have Spartan-7, and depending on the features you need on the board, the prices can be quite reasonable.
 

Online iMo

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Re: The mess of FPGA development
« Reply #3 on: March 27, 2019, 06:18:45 pm »
OS you mess with?
Readers discretion is advised..
 

Offline NivagSwerdna

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Re: The mess of FPGA development
« Reply #4 on: March 27, 2019, 06:40:44 pm »
Playing with old devices has severe hazards... try and get current if you can, the modern tools are much better (said by someone playing with a Max7000)
 

Online ataradov

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Re: The mess of FPGA development
« Reply #5 on: March 27, 2019, 06:46:18 pm »
No, FPGA development is screwed up like this and no vendor is better than the others. And yet somehow it actually became much better in recent years than it was before. At least now with most vendors you don't have to fight FlexLM.
« Last Edit: March 27, 2019, 06:53:22 pm by ataradov »
Alex
 

Offline rstofer

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Re: The mess of FPGA development
« Reply #6 on: March 27, 2019, 06:51:44 pm »
I am starting to think I am crazy here. Is it just me or is the toolchain situation for FPGAs severely f*ucked up? I confess: I am a total newbie, just want to get my first insights to the FPGA world and pulled a simple FPGA breakout board (miniSpartan3) from my electronics box (well I bought that one a few years ago but life happened and now here I am with a need for it).

So the FPGA is a Xilinx Spartan 3A - I go to the Xilinx website, first impressions:

1) The fancy new design suite doesn't support the older devices like the spartan 3 (and I'm not even sure there's a free version of it)
Microsoft isn't doing much with Windows 95 either.  I love the Spartan 3 boards but I realize I have to install ISE 14.7 in parallel with the newer Vivado I need for my Artix devices.
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2) So I go to the "ISE Design Suite", of which the newest version only supports Spartan 6.
Yes, Xilinx walked away from ISE once Vivado was up and running.
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3) I have to download version 10 of it which is from 2008.
Why?  I have 14.7 installed on Win 7 and Win 10 to work on projects using Spartan 3 and 3E.  What I THINK Xilinx means is that 14.7 only works on familites UP TO Spartan 6.
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4) It crashes on start-up, so I have to create some magic registry keys for it to even start
As I recall, all you have to do is rename a couple of files which are already on your machine.  It's nice to see that Xilinx now has a Win 10 version but it was never a big deal - the solution was all over the Internet.

The problem started when Microsoft created a new version of the OS.  Suddenly, a program on life support didn't work.  Who's fault is that?  Some published interface goes sideways but it doesn't make sense to blame it on Xilinx.  Their ISE worked BEFORE Microsoft changed the interface.  One of the hazards developers run across, daily!
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5) It doesn't support the footprint I have, so I need to get a service pack. Which won't install for the first 2 trys but magically work on the third try.
What does Google have to say?  All of human knowledge is on Google.  I have never had that problem.
Quote
6) Now it somewhat runs but every half an hour or so it just crashes anyways. No way found to circumvent that so far.
Never had that problem either and I have been using 14.7 since it was released and I think I started with version 6 (I'm not sure of that).  Hit up Google.  If you have a problem, it's a good bet somebody else had the problem and found a solution.
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I am sorry if this is a bit of a rant. I'm just really frustrated. Like, how do you guys who work on FPGAs for a living even stand this? I get this is a rather old FPGA - but it is still in production, how can there not be an up to date way to program it?
A misguided rant, in my view.  14.7 works fine, I use is all the time with my obsolete boards.  But the key word here is 'obsolete'.  The entry level boards these days use Artix 7s and Vivado is the toolchain.

Truth be told, I wasn't a fan of Vivado.  I'm too old for such a seismic shift in the development tools.  It took me a while to get back up to speed.  Now I ALMOST prefer Vivado.
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Is there any alternative to this whole mess? Like can I just use an editor of my choice to write up some VHDL and only use the xilinx tools to create the bitstream I need? How would I go about that if possible?
RTFM!  Some designers used that approach and probably still do.  All of the Xilinx tools can be run from the command line or from a Makefile.  Any editor can be used but one with language awareness, like the Vivado editor, seems preferable.  Maybe Notepad++, it has support for Verilog and VHDL.  I haven't used a Makefile but I would bet that the individual programs return error codes and failure at any particular step can be noted by 'make' and the process aborted.

Here is a concise 423 page manual on command line tools for 14.5.  Search Xilinx for something newer - there may not be an important change in the name and parameters for the tools.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_5/devref.pdf

There are some tools, like Data2Mem which allow BlockRam in bitstreams to be updated.  This is very useful when you want to cram machine code into a CPU memory and change it as the CPU source code changes.  To my knowledge, it ONLY works at the command line.

Sit back, smoke 'em if you got 'em, and think about the realities of aging.  Even Vivado is 7 years old.  Here's an interesting fact:  It took 1000 man-years and $200 million to create Vivado.  ISE was 15 years old at the time...

https://en.wikipedia.org/wiki/Xilinx_Vivado

The alternative is to change over to Altera or one of the smaller players like Lattice.  It might work out...
« Last Edit: March 27, 2019, 06:54:31 pm by rstofer »
 

Offline pigtwo

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Re: The mess of FPGA development
« Reply #7 on: March 27, 2019, 06:56:56 pm »
Quote
2) So I go to the "ISE Design Suite", of which the newest version only supports Spartan 6.
3) I have to download version 10 of it which is from 2008.
Why do you have to use ISE 10?  ISE 14.7 supports all Spartan 3's.  I've used ISE 14.7 for Spartan 3 designs and didn't run into many problems.  Now ISE is not great but in my experience it's not crashing every 30 mins bad. 

For reference I've used ISE 14.7 on Windows 7 for years and it's fairly stable.  I think for newer Windows you have to use a VM but it's about as painless as Xilinx could make it.  But still a little crazy that you have to do that. 
 

Offline jmelson

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Re: The mess of FPGA development
« Reply #8 on: March 27, 2019, 07:21:21 pm »
You need to get one of the older iSE versions to do Spartan 3A development.  I think you can use up to iSE rev 14, but check the release notes.
I still support some really old stuff, but the oldest I actively develop for is the Spartan 3A and 3AN (has the EEPROM in the package).

I run the Linux version, and it is quite reliable.  I used to do this on Win XP in a virutal machine, using iSE ver. 10, and had no problems, either.
Now, there are a HUGE number of development options, and maybe you are doing something wrong, and once you get familiar with the package, the crashes will stop.

Not only can you use the editor of your choice, but there is a way to SELECT your preferred editor in a menu somewhere.  I've never done it, but I DO use an outside editor for all major hacking on the VHDL files.  iSE automatically detects the files have new update times, and recompiles only what is changed.

There was a change in (I think) 2016 where the 3AN started using a larger EEPROM, and you have to force a different module to be used in impact to download the configuration, or you get a REALLY cryptic error message,  But, if your dev board is older than that, or uses external EEPROM, you won't run into that issue.

Jon
« Last Edit: March 27, 2019, 07:27:05 pm by jmelson »
 

Offline rstofer

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Re: The mess of FPGA development
« Reply #9 on: March 27, 2019, 07:28:34 pm »
I think for newer Windows you have to use a VM but it's about as painless as Xilinx could make it.  But still a little crazy that you have to do that.

You don't!  I just followed the directions at Xilinx
https://www.xilinx.com/support/answers/62380.html

I found it with a Google search 'xilinx ise 14.7 windows 10 fix'

This compatibility problem with Win 8.1 and Win 10 just isn't a big deal.  Google is all over it!  So is Xilinx.  But that doesn't excuse the user from having to do a little searching.

When I first installed 14.7 on Win 10, it blew up.  Now what?  It doesn't work!  The sky is falling...

So I Googled for the solution and, voila', I wasn't the first person to encounter the problem.  It was a well known issue and the fix was also well known.  No big deal!  Just hit up Google, all of human knowledge is out there.
 
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Online ebastler

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Re: The mess of FPGA development
« Reply #10 on: March 27, 2019, 07:31:26 pm »
Why do you have to use ISE 10?  ISE 14.7 supports all Spartan 3's.  I've used ISE 14.7 for Spartan 3 designs and didn't run into many problems.  Now ISE is not great but in my experience it's not crashing every 30 mins bad. 

For reference I've used ISE 14.7 on Windows 7 for years and it's fairly stable.  I think for newer Windows you have to use a VM but it's about as painless as Xilinx could make it.  But still a little crazy that you have to do that.

I second that. ISE 14.7 is the most recent release that you should use for the Spartan-3 and Spartan-6, I believe. It's old-fashioned and bloated, and sometimes gives spurious "synthesis failed" errors (upon which you just have to try again). But it has never crashed on me yet.

Have you found this technote on how to fix things under Windows 10? Without the DLL swap desribed there, ISE terminates as soon as you open a file selection dialog, if I recall correctly:
https://www.xilinx.com/support/answers/62380.html

Edit: Ah, I see that rstofer has just beaten me to it.

Edit2: Congratulations, rstofer, on post #5555!
Now you can never post again to preserve that magic number.  ;)
(Or make 1111 posts real quick...)
« Last Edit: March 27, 2019, 07:34:54 pm by ebastler »
 

Offline rstofer

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Re: The mess of FPGA development
« Reply #11 on: March 27, 2019, 07:37:02 pm »
In the bad old days, hobbyists wouldn't even have access to development tools like Vivado.  Who would invest $200 million and then give the product away?

One of the side effects of being really old is that I remember when static RAM came out and LEDs were a new thing.  Along the way there were some neat devices for which I could never afford the tools.  They were strictly marketed at manufacturers.

From the point of view of support costs, it makes sense to avoid the hobbyists.
 

Offline pigtwo

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Re: The mess of FPGA development
« Reply #12 on: March 27, 2019, 08:38:35 pm »
I think for newer Windows you have to use a VM but it's about as painless as Xilinx could make it.  But still a little crazy that you have to do that.

You don't!  I just followed the directions at Xilinx
https://www.xilinx.com/support/answers/62380.html

I found it with a Google search 'xilinx ise 14.7 windows 10 fix'

This compatibility problem with Win 8.1 and Win 10 just isn't a big deal.  Google is all over it!  So is Xilinx.  But that doesn't excuse the user from having to do a little searching.

When I first installed 14.7 on Win 10, it blew up.  Now what?  It doesn't work!  The sky is falling...

So I Googled for the solution and, voila', I wasn't the first person to encounter the problem.  It was a well known issue and the fix was also well known.  No big deal!  Just hit up Google, all of human knowledge is out there.

Oh wow!  I was just thinking I didn't want to move to Windows 10 because I didn't want to deal with the whole ISE VM malarkey.  I figured Xilinx was never providing any kind of support of ISE again.  What's super weird is Xilinx had that special Windows 10 version that came on a VM.  They went through all the trouble to package ISE in a VM and have the user interact with ISE through a VM when the fix was as simple as renaming files?  Maybe I'm missing something about their reasoning for doing this but that seems like way more work than what the eventual fix was.
 

Offline rstofer

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Re: The mess of FPGA development
« Reply #13 on: March 27, 2019, 09:02:00 pm »
Oh wow!  I was just thinking I didn't want to move to Windows 10 because I didn't want to deal with the whole ISE VM malarkey.  I figured Xilinx was never providing any kind of support of ISE again.  What's super weird is Xilinx had that special Windows 10 version that came on a VM.  They went through all the trouble to package ISE in a VM and have the user interact with ISE through a VM when the fix was as simple as renaming files?  Maybe I'm missing something about their reasoning for doing this but that seems like way more work than what the eventual fix was.

The Windows 10 version is a recent development.   I installed 14.7 in August 2017 and this option wasn't available.  It has been working ever since.  I just went to Google...

Maybe Xilinx took the easy way out and relieved themselves from taking heat over the file renaming solution.  Or maybe their users weren't comfortable with changing file names 

"Here, run it this way and leave us alone!"
 

Online RoGeorge

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Re: The mess of FPGA development
« Reply #14 on: March 27, 2019, 09:18:26 pm »
Is it just me

Yes.

Pretty much any professional and highly specialized (niche) software will be the same (I mean with compatibility issues years later).  In fact some will be way worst, they won't run at all.

Xilinx IDEs (including its former versions) are one of the most friendly and well maintained packages out there, maintained over many decades, on both Linux and Windows.  Still available for download even today.  For free.  Compared with other SW IDEs, you must admit this is quite a record.  Yet, one still need to RTFM.

In my experience the Xilinx IDE was good.

What version of Xilinx and version of OS are you using?  Sometimes it's just the OS, and a virtual machine can fix the problems.
« Last Edit: March 27, 2019, 09:21:51 pm by RoGeorge »
 

Offline Mr.Elendig

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Re: The mess of FPGA development
« Reply #15 on: March 28, 2019, 10:14:49 am »
In the bad old days, hobbyists wouldn't even have access to development tools like Vivado.  Who would invest $200 million and then give the product away?

One of the side effects of being really old is that I remember when static RAM came out and LEDs were a new thing.  Along the way there were some neat devices for which I could never afford the tools.  They were strictly marketed at manufacturers.

From the point of view of support costs, it makes sense to avoid the hobbyists.


Thankfully there are now projects like iCEBreaker and free software stacks for fpga development. (Though with a rather small selection of supported devices)
 

Offline Ice-Tea

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Re: The mess of FPGA development
« Reply #16 on: March 28, 2019, 11:07:51 am »
I never really understood why they drop whole device families for new SW. How hard can it be to import all the data in a new SW suite? The data exists. If it is no compatible with the new environment or can be made to be with minimal effort you're not doing it right...

Had to run a Spartan II device earlier this year.. I accidently installed the VM version of 14.7 first. Then installed 14.7 "vanilla", wrestled with it for some time to get it running on Win10, figured out II wasn't supported on it and installed 10.0 in the end.

Off course, I couldn't get the programmer to work in Win10 so I had to reinstall 14.7 (which I had previously deleted to make room on my poor 256GB SSD...).

...

Yeah, you're not alone..
 

Offline rstofer

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Re: The mess of FPGA development
« Reply #17 on: March 28, 2019, 02:16:47 pm »
In the bad old days, hobbyists wouldn't even have access to development tools like Vivado.  Who would invest $200 million and then give the product away?

One of the side effects of being really old is that I remember when static RAM came out and LEDs were a new thing.  Along the way there were some neat devices for which I could never afford the tools.  They were strictly marketed at manufacturers.

From the point of view of support costs, it makes sense to avoid the hobbyists.


Thankfully there are now projects like iCEBreaker and free software stacks for fpga development. (Though with a rather small selection of supported devices)

Which just about eliminates using modern devices.  Using open source software almost always precludes optimal routing and the use of special features.  This just isn't an arena where open source brings anything to the dance.

There are a few complainers here but the reality is, Xilinx is giving us access to quality software - FREE!  As in it didn't cost a dime!

Was I happy when I found ISE crashed on Win 10?  Of course not!  But 10 minutes later I had it running so what's the big deal?  Nothing ever works right out of the box and ISE/Win 10 is one of them.

Having spent $200M, how much more should they spend on Vivado to add in obsolete devices for which there is already a free toolchain?  Of course they're going to cut the project off.  They have coverage for all the devices, they have a more modern toolchain for the current, and more modern, devices yet they still support the older devices.  Looks like pretty good coverage to me.  Yes, it would be nice to have the ILA with older devices but I didn't have it before and I don't have it now.

It's also fair to just change vendors.  Altera is looking for customers, maybe it's time to vote with your feet.

Meanwhile, I'll stay where I am.   ISE and Vivado both work and since I use Digilent boards, I haven't had to worry about whether various device programmers work.  I suspect they do but all the current Digilent boards have on-board USB programmers so I'll never find out.

Were're talking about FPGA development, the pinnacle of design.  And some folks can't find the solution to ISE 14.7 on Win 10 using Google?
 

Offline Ice-Tea

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Re: The mess of FPGA development
« Reply #18 on: March 28, 2019, 02:54:37 pm »
Having spent $200M, how much more should they spend on Vivado to add in obsolete devices for which there is already a free toolchain?

Well...

Quote
It's also fair to just change vendors.  Altera is looking for customers, maybe it's time to vote with your feet.

From a bussiness perspective enough to keep that from happening. And as I mentioned before: how much can it really cost them to port it? I wouldn't even mind if ILA and other whistles and bells weren't supported.

« Last Edit: March 28, 2019, 03:42:47 pm by Ice-Tea »
 

Offline cyr

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Re: The mess of FPGA development
« Reply #19 on: March 28, 2019, 03:20:45 pm »
I've used Xilinx tools since ISE v6.x, and long since learned to accept that FPGA development software just sucks. You learn to live with or work around the obvious bugs, like crashes, "unexpected" errors etc, and hope there aren't any subtle ones that will bite you later. I think it's the natural result of the complexity, niche market, lack of competition and perhaps that FPGA makers just suck at software development?

The absolute worst example I remember is the Xilkernel RTOS and related EDK libs. The mistake of actually trying to use that in a product cost quite a lot, and looking at the code while tracking down the bugs really made me wonder about the company that allowed that to be released...   Yes, it's free (with source) and probably not developed by the same team that make the FPGA tools but still - these free tools exist in order to sell the chips, and the chips don't do anything useful without the tools.
 

Offline rstofer

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Re: The mess of FPGA development
« Reply #20 on: March 28, 2019, 03:41:15 pm »
Having spent $200M, how much more should they spend on Vivado to add in obsolete devices for which there is already a free toolchain?

And as I mentioned before: how much can it really cost them to port it? I wouldn't even mind if ILA and other whistles and bells weren't supported.
Probably multiple millions.  How far back should they go?  If it cost $200M to create an IDE plus the hard part adding more 'hard part' isn't going to be free or even cheap.  Plus they would have to maintain/upgrade/fix/validate (the really big cost) the new software to accommodate devices they no longer produced.  What a colossal waste of money.

They made a business decision:  They had coverage for the older devices and they had a new toolchain for newer devices.  They had no intention of supporting the older toolchain or the older devices.  It was time to move on.

We still have a toolchain for the obsolete devices.  They didn't just withdraw the software, they drove a stake in the ground.  Then they moved on.

I support the decision and I'm sure the stockholders feel the same way.  This is a business, not a hobby shop.  In the end, it's about the money!
 
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Offline james_s

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Re: The mess of FPGA development
« Reply #21 on: March 28, 2019, 03:47:12 pm »
I use ISE 14.7 on Win7 regularly and have for years, it works fine. I like the Altera software better in most cases but both are big bloated complex programs. This is just the nature of FPGAs, getting the toolchain running is the easy part.
 

Offline Ice-Tea

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Re: The mess of FPGA development
« Reply #22 on: March 28, 2019, 03:48:32 pm »
Having spent $200M, how much more should they spend on Vivado to add in obsolete devices for which there is already a free toolchain?

And as I mentioned before: how much can it really cost them to port it? I wouldn't even mind if ILA and other whistles and bells weren't supported.
Probably multiple millions.

I have no supporting evidence to the contrary but it seems a bit much. Especially if you put "a stake in the ground" concerning new features.

Quote
In the end, it's about the money!

Yes. Of which they will loose considerable amounts if people go shopping on the other side of the hedge because they are fed up with it.
 

Offline james_s

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Re: The mess of FPGA development
« Reply #23 on: March 28, 2019, 03:51:33 pm »
If they go shopping on the other side of the hedge they'll find exactly the same situation. I have two different versions of Quartus installed side by side in order to support all the devices I work with.
 

Offline Ice-Tea

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Re: The mess of FPGA development
« Reply #24 on: March 28, 2019, 04:10:29 pm »
I'm well aware. But the argument works in the other direction as well: a vendor that supports devices for longer in their latest SW would have an additional notch on their scoresheet while selecting devices which would bind customers more closely ;)
 


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