Convert push pull output to conditional non-inverted open-drain

[Infraviolet]

I want to convert a push pull (drives to Vcc or Gnd) to a non-inverted open-drain or open-collector (driving LOW at Gnd when the push-pull is low, floating and pulled to Vcc by a resistor when the push-pull is high).

I also want the driving LOW to be conditional on a separate input pin to this converter circuit being driven LOW, so if this extra pin is high the converter always outputs a floating high, only when it is LOW and the push-pull wich is being converted is also low is a LOW to be output.

What is the lowest part-count way I can do this, without resorting to any weird specialised component for which there is only one model and some strange pinout that would be incompatible for any replacements if supply of that one part ran out?

For an inverted converted output, without the extra input making it conditional, I would just have the existing push-pull drive the base of an NPN transistor, emitter at Gnd. I think that the approximately 0.6V above ground which the output could go down to would be low enough for virtually any other chip which was having signal sent to it by the open-drain to recognise this as being a LOW.

But with the inverting, and conditionality on the extra signal, would I need a logic gate chip, and extra transistor and several resistors, or is there a solution which would take less parts and board space?

Thanks

[Peabody]

If you could accept the separate input being active high, I think it can be done with an NPN transistor and a resistor.

[Ian.M]

One 74LVC2G53 and 2 mm² board area (DSBGA package)?

[Peabody]

One 74LVC2G53 and 2 mm² board area (DSBGA package)?

How would you make that a fool-proof open-collector output?  I mean tristate unless both inputs are low.  It seems if the /EN input is low but the other input is high, the output would be active high, not tristate.

[Ian.M]

Ground Y0. Output from Z.  Leave Y1 floating (or tie to Z)
See datasheet fig.2 and table 4: https://assets.nexperia.com/documents/data-sheet/74LVC2G53.pdf

Its only 'foolproof' for signals within the supply rails.  If you need an open drain output that can go above Vcc, that's discrete MOSFET territory (e.g. any small MOSFET with gate threshold voltage < Vcc/2 + a 74LVC1G02 to drive its gate) or very specialised IC territory.

[mikerj]

The absolute lowest parts count if you can tolerate the Vf would be a diode.  A Schottky would minimise the voltage overhead but leakage currents could be problematic.  An NPN configured as common base with your logic output driving the emitter may also work.

[Ian.M]

Remember, the O.P.'s got that pesky active low Enable requirement, so needs an OR function, and open drain as well.   Good luck doing that with diodes, or even a couple of transistors!

[langwadt]

Remember, the O.P.'s got that pesky active low Enable requirement, so needs an OR function, and open drain as well.   Good luck doing that with diodes, or even a couple of transistors!

this?

[Peabody]

Well here's my candidate for the two-transistor circuit producing open collector.  There is no gain in the circuit since sink current is limited to the sink current provided by the pull-pull output, but that should be enough.  Also, it assumes that Vcc is no higher than the high voltage of the push-pull output.

Normally we think of turning on an NPN by raising the base voltage.  But really we just need a 0.6V differential.  So we can also turn it on by lowering the emitter voltage.  By the same token, we can turn it off by raising the emitter voltage.  So this circuit connects the push-pull output to the emitter of the NPN.  If the push-pull output is high, then it is equal to the base voltage, and no collector current will flow.  Or if both base and emitter are low, no collector current will flow.  Collector current only flows if the base is high and the emitter is low, which is the case only when both inputs are low, as specified by the OP.

[fourfathom]

I don't know how tight your board space is, or your definition of complexity, but something like the AHC1G125 (a tiny single tri-state buffer, active-low enable) is available in a 5-pin SOT-23 package as well as the even smaller SC70 and "DRL" package.  This series of devices tend to be inexpensive and available.  A transistor solution will probably use more PCB real estate than this.

[magic]

The absolute lowest parts count if you can tolerate the Vf would be a diode.  A Schottky would minimise the voltage overhead but leakage currents could be problematic.  An NPN configured as common base with your logic output driving the emitter may also work.

An even better solution is a common gate MOSFET (gate to VCC, source to GPIO, drain is the output).
This avoids stupid problems caused by BJT's parasitic diodes and base current.

edit
None of it solves the additional requirement for an "enable" input.

[Infraviolet]

Thanks, I'll have a look about tri-state buffer chips with active low enable pins. Failing that langwadt's and Peabody's 2 transistor solutions look pretty good. Using one of the transistors with base and emitter to handle the combining of the enabling and the push-pull signal, and provide the open drain at the same time, is a good trick to avoid having to have separate components for doing logic combintions, for handling any inverting and then for giving the final open drain/collector type output.

[Peabody]

I still don't underestand how tri-state buffers or multiplexers produce an open collector/drain output.

[Ian.M]

I still don't underestand how tri-state buffers or multiplexers produce an open collector/drain output.

Ground buffer input (or tie high if inverting).  Apply signal to active low Enable input to make a non-inverting open drain^* buffer.

* the body diode of the never active upper output MOSFET  clamps the output to Vdd, so its limited to between the rails.

[fourfathom]

* the body diode of the never active upper output MOSFET  clamps the output to Vdd, so its limited to between the rails.

Correct, this wouldn't work with a higher than Vcc-voltage output, but the OP did say "floating and pulled to Vcc by a resistor when the push-pull is high".

[Peabody]

I still don't underestand how tri-state buffers or multiplexers produce an open collector/drain output.

Ground buffer input (or tie high if inverting).  Apply signal to active low Enable input to make a non-inverting open drain^* buffer.

But the OP has two inputs, both of which need to be low for an active-low output.  Output needs to be tri-state for the other three input possibilities, and never active-high.  I looked at the multiplexer you referenced, but don't see how that would work.  And a simple tri-state buffer only has one input to begin with.  So could you explain exactly how this would work?  Maybe even a drawing.

[fourfathom]

And a simple tri-state buffer only has one input to begin with.

Yes, the tri-state buffer will only approximate the open-drain output if you drive the ENABLE pin and tie the IN pin low.  If you can tolerate an actively driven "high" state then you can use both IN and ENA inputs to get the desired function.  But this is of course not a true open-drain output and may not work in the OP's design.

Again, I like the Texas Instruments "Little Logic" (with second sources) for stuff like this.  Two tiny and cheap chips will do the job:  A dual open-drain NAND gate is one, the other is a triple inverter that converts the NANDs to ANDs.

[Ian.M]

I didn't suggest a multiplexor, I suggested a SPDT analog switch, with active low Enable, using one switch element as the output pulldown.  See reply #4 for connection details, or if a true open drain, above Vdd is required, a two component solution, namely a single NOR driving the gate of a NMOSFET.

[Peabody]

I didn't suggest a multiplexor, I suggested a SPDT analog switch, with active low Enable, using one switch element as the output pulldown.  See reply #4 for connection details, or if a true open drain, above Vdd is required, a two component solution, namely a single NOR driving the gate of a NMOSFET.

Well, you suggested the 74LVC2G53, which Nexperia says is a "2-channel analog multiplexer/demultiplexer".  In any case, your reply #4 is what I've been trying to figure out.  But I think I understand now.  If you ground Y0, then the OP's two inputs would be ENable and Select.  If both are low, Y0 will be selected and the output will be low.  And if ENable is high, the output will be tri-state.  But if ENable is low and Select is high, and Y1 is NC, the switch would just connect Y1 to whatever the current state of the pulled-up output (Z) is, but Z would not be affected.

[Infraviolet]

I finally got round to the application where this circuit was to be used. I found that the options in replies 7 and 8 don't entirely keep to being open collector, when the emitter is high on the output transistor they can actually drive the output high, although with some source impedance and therefore not to the extent an actual push-pull output can. I came up with the following circuit instead, effectively its an OR gate for the two inputs, the enable line and the push-pull, which then sends the OR'd output to an inverting transistor which makes the output open collector.

[fourfathom]

Why not just tie the collectors of T9 and T10 and the base of T11 together, with a single pull-up?

[Kim Christensen]

Or embrace RTL:

[fourfathom]

Or embrace RTL:

Even simpler!  Not bad!