Transistor voltages (Ucb vs Uce)

[J23]

I got some nice collection of bibolar transistor and therefore been looking some key values they have. I have been using alltransistors.com site, for example 2N2222: http://alltransistors.com/transistor.php?transistor=1773

Voltages they give just confuses me a bit. I've thought that Ucb, Uce and Ueb are maximum voltages which the transistor can handle wihtout breaking.
For some reason Ucb is usually much larger value than Uce, which is kind of strange. In most circuits I've seen, base has allways voltage somewhere between collector and emitter. In that case voltage between collector-base would allways be less than voltage between collector-emitter. So you would not have to care about maximum Ucb at all?

I also would like to know if voltages mentioned at alltransistors.com are for that exact polarity, ie Ueb is maximum voltage from emitter to base, not from base to emitter.

ps. sorry for my poor english

[Kleinstein]

For the voltage rating of transistors, there are two slightly different cases:
1. Base connected to emitter, and voltage applied collector to emitter/base.
2. Base open, and voltage applied collector to emitter.

The second volatage rating can be slightly lower, as leakage from collector to base in amplified and may cause trouble.
How the two ratings are called slightly depends on the datasheet / manufacturer / book. Its resonable to call the first U_cb and second U_CE.

Usually the volatage ratings include the sign, thus often negative numbes for PNPs. The limit base - emitter is obvieous much lower, when the junction is in forward direction.

[T3sl4co1l]

You generally want to design based on C-E.

C-B means you can get to this voltage by actively pulling leakage current out of the base (failure to do so results in avalanche breakdown, which usually behaves like a zener diode, but can act very noisy or even exhibit negative resistance like an SCR, but usually very quickly like a spark discharge).

There aren't many applications where C-B would be relevant, because for example, linear applications can't draw much current and dissipate much power at those voltages anyway (due to second breakdown limitations -- see the safe operating area (SOA)), and switching applications are limited due to the slow transition between, essentially, Vcbo and Vceo (except starting from Vce(sat) and going up in turn).

Switching transistors will frequently have an RBSOA (reverse bias SOA), which shows how much voltage you can expect to drop (freely, without excessive current flow or damage) within a certain timescale after turn-off.

The reason for this phenomenon is, the transistor takes time to turn off, and as it does so, more and more of the transistor junction becomes "off".  The transition from "on" to "off" occurs through the thickness of the C-B junction, so that immediately after turn-off, the region that is "off" is thin, and not much voltage can be dropped before breakdown occurs.  As time goes on, the region grows, and more voltage can be withstood.

Also, avalanche introduces charge carriers, just like turning on the transistor does, so that avalanche during turn-off is just like dumping current *into* the base, when you thought you were pulling it *out* -- it acts to turn the transistor on, which not only slows turn-off time, but dissipates a heck of a lot of switching loss in the process.

So you want to be very careful that, when you turn off a BJT, you do it sharply (how fast the B-E junction turns off, controls how fast the C-B junction turns off, even after a fairly sizable time delay between those events (storage time t_stg)), and you limit the C-E voltage risetime (usually with a dV/dt snubber) to avoid this dynamic avalanche effect.

Tim