EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: LoveLaika on March 07, 2025, 03:09:22 pm
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I'm researching QFN parts for a potential project, and I'm concerned about reflow soldering with these components. According to some datasheets, the exposed pad on the back of some QFNs have pad vias in them, mostly it seems for either heat dissipation or ground. They seem rather small (typical drill size of 0.254 mm diam.), but how would you make sure that the part holds and that solder doesn't flow to the other side? Are there any tricks to it, or is it not a problem if the holes are small?
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I have read that holes have to be smaller than 0.3mm to not stole solder while reflow.
To not put paste into holes the holes in stencil have to be in different places than holes in pad.
I am using 0.3 diameter holes in these pads and it is accepted by contract manufacturer. I have never seen how it works regarding solder going into them.
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Thanks. Guess small holes are the way to go then.
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There are many ways to Prevent Solder Wicking Through the Vias. Two common methods are via tenting and via plugging. You can also use smaller vias. If the vias are small enough and the solder paste volume is well controlled, surface tension will usually keep most of the solder on the top side. It is wise to reduce Solder Paste on the Exposed Pad. If too much solder paste is applied to the thermal pad, it can cause excessive solder flow, potentially pulling the QFN down unevenly or creating voids. The usual approach is to stencil small, distributed openings instead of a solid paste deposit. If you need optimal thermal dissipation and electrical grounding, a more advanced approach is via-in-pad with cap plating. This means vias are plated over and planarized, preventing solder from wicking while maintaining a flat surface.
For small via sizes (~0.254 mm), solder wicking is usually not a major problem if the PCB manufacturer follows good design practices. However, for larger vias or when using a high amount of paste, wicking could cause solder starvation on the thermal pad or increase the risk of QFN floating. If you want to get further information about via- in- pad, you can see here: https://www.pcbway.com/blog/PCB_Basic_Information/Via_in_Pad_Design_PCB_Knowledge_177b607f.html (https://www.pcbway.com/blog/PCB_Basic_Information/Via_in_Pad_Design_PCB_Knowledge_177b607f.html)