I have made a simulation in LTspice to prove my theory.
The first image is the waveform plot of a charged capacitor connected to an empty capacitor. The voltage on the charged one drops while the voltage on the discharged rises. They meet in the middle.
(the .ic spice directives are there to set the initial voltage of the two capacitors; C1 charged at 20V and C2 discharged at 0V)

The second image shows the waveform of the voltages across the model charged capacitor (voltage source + cap) and discharged cap. As you can see, the waveform is identical to the waveform in the first image (ignore the spike at t=0, that was caused by the startup condition of the transient simulation; I had to use this condition, so the simulator didn't begin the simulation with already charged capacitors).

I also zoomed into the waveform at t=1h, to prove that the voltages will meet at exactly half the initial voltage (all four traces are overlapped).
Here is my LTspice simulation file, feel free to test it yourself.
