uCurrent Gold Schematic

[uf29857]

I am working on my university project to design current meter to measure currenst from nano amps to 3 amperes positive DC only. Design is based on Dave's ucurrent gold and videos designing a better multimeter. Components being used are, MAX4239,CSD16340Q3(NMOSFET), ADS1115, ESP32 ucontroller. Charging circuit for battery, and usb to uart (CP2102). I have attached my schematic. Please review it and feedback will be highly appreciated.

[xvr]

Remove Q1 from programming circuitry - it was originated in ESP8266 and blindly migrated to ESP32 by some 'clever' Chinese engineer (or student, I don't sure). For ESP32 it really prevent it from programming at all.
And consider take ESP32-S3 or ESP32-C6 based modules. They have on-board USB-to-JTAG adapter and do not required external programming circuitry

[uf29857]

Thanks for the feedback. Will the circuit work as intended?

[xvr]

Strange arrangement of C6/R12/R16 and C8/R13/R17 - they short circuited.
OP circuit also wrong - they plugged without any feedback circuits.
I also would some protection for input circuit, for example - diode (or TVS) across J1. If CPU turn on wrong shunt resistor on high current it will just blow out.
Q1 placed upside down.

May be something more, that I didn't spot [yet].

[uf29857]

Thanks for poinitng it out. I forgot to connect output feedback.
I have placed NMOS in antiparallel with the lowest shunt resistor for protection.
Q1 will check again and will remove it as suggested in the previous comment.

[xvr]

> I have placed NMOS in antiparallel with the lowest shunt resistor for protection.

For which protection? In current configuration lower shunt resistor will be always turned on by body diode of Q1 or Q4.
Also Gate of Q1 now referred not to ground of whole schema (as should be) but again high pin of current input terminal

[uf29857]

As per the dave's video, placed for reverse current protection. Your are right will remove that one. And will plave tvs across J1

[floobydust]

I thought the nA shunt 10k is simply left in-circuit all the time, no need to switch it in with a mosfet 
I wonder why the MAX4239 isn't just one stage with AV=100 instead of two parts AV=10. The bandwidth is still high enough for most needs.
Any protection/clamp TVS etc. has leakage current and must be carefully thought out.

[uf29857]

With only 2 switches (FETs) and 3 shunts one would have the drop from the FET also with the lowest shunt. The voltage sense would not be through the 10 and 10 K resistors, but the direct way on the top. So the 3 rd Fet is required. (This was a comment from one guy here and dave agreed to this).
Which tvs diode i should use? Any recommendation?

[floobydust]

I didn't realize this design has been around for 10 years, loads of threads, comments and mods. I haven't really dug into it.

For whatever reason, if a shunt was overloaded and saw say +10V then that hits the op-amp input. Assuming the MAX4239 has substrate diodes to GND and  V_CC then I would say it dumps that to the rails, limited by R7, and the 3.3V rail which will just kick up and destroy things.
Other people can maybe offer their insight. Another USB ESD diode-array might be enough, after R7.

CSD16340Q3 N-ch mosfet is for 5V drive but it's getting 3.3V and I don't see anything special about it's leakage current spec.
I would not power analog circuitry from MCU power, it's just too dirty especially ESP32 does draw a lot of current on TX packets. To measure nA with a power piggy MCU right there I think is going to have some issues, EMI and more.

[uf29857]

CSD16340Q3 Rds(on) is 6.1m ohm on at 2.5V on datasheet so, i think i will will work at 3.3V.
For analog circuitry, will it be better to use another LDO ?

[Kleinstein]

In the circuit with FET switching the FET internal diodes will activate the 10 mOhm shunt, once the voltage goes obove some 500-1000 mV. So the FETs would protect the amplifier to a good degree.
Not much protection is a slight problem with the original version.


For the FET switching 3.3 v gate voltage should be OK. It may however by that the FETs with rather low threshold are not ideal woth leakage. So the accuracy in the lowerst current range can suffer, especially at a little higher temperature.
There is no need for a separate LDO for the gate control. With OK decoupling a single regualtor should be OK.

[uf29857]

Thanks for your response. Will it be better to use separate ldo for analog circuitry or one ldo for both analog and digital circuitry is fine. And also in case of one ldo are decoupling capacitors OK?

[Kleinstein]

A single LDO is probably OK. It may help to isolate the digital part with  an extra inductor / resistor in the supply part. For the decoupling it is not just the parts and the schematics, but possibly more the layout that is relevant. So keep the fast part local and mind the ground paths (avoid ground coupling).  A 2nd LDO would not help much with the layout - more complicate things.

[floobydust]

ESP32-WROOM dual-core 240MHz CPU average draw 118mA RX, but up to 379mA peak TX with WiFi.
Myself, I would not power sensitive analogs (op-amps, ADC) off that same 3.3V rail and consider it somewhat dirty. 2.4GHz nearby is another set of problems IMHO as the uCurrent doesn't have the RF/EMI filtering, it was never wireless.

[uf29857]

I have used two LDOs. One for esp32 and one for ADC and current measuring circuitry.

[uf29857]

I have designed four layer PCB. Top layer and Bottom layer are signal/PWR layers and inner two are gound layers.
I have used one LDO (RT9080) for ESP32 and one for ADS1115 and Current measurement circuitry.  U6 (in PCB) for ADS1115 and analog circuitry and U3 for ESP32.
U4 and U5 are MAX4239. U2 is ADS1115. U1 is CP2102. IC1 is TP4056. Q2, Q3 and Q4 are CSD16340Q3 N MOSFETS.
R21 is four terminal resistor and i want to confirm the connections. I shall be gratefull for the feedback.
Thanks in advance.
I also can send altium files  for review.