Understanding op amp outputs and overcurrents

[Infraviolet]

To what extent do op amps survive over-current on their output pins? The output pins have ratings given in the datasheet, typically around 20mA to 30mA for ones I've looked at, but the datasheets also often say that op amps are rated for having a short circuit on the output "continuously" (atleast for the MCP602* and MCP629*).

So does this mean they'd survive trying to drive a zero ohm short to VCC or Gnd (when used in VCC to Gnd as power rails config), and just not give the expected output voltage (as the limited current would alter the voltage which could be provided)? Or does it mean something else?

I know op amps don't like driving capacitative loads for feedback reasons, but do current considerations also mean the apparent short which a capacitor looks like (when empty) would cause a damaging current? Yet I see example circuits online, and even in books like Horowitz and Hill where an op amp's output is going straight to something like a 1uF non-polarised (must mean ceramic hence low ESR) capacitor with no resistive protection.

And for multi-op-amp IC packages (dual, quad...) if a single op-amp can cope with brief or long term "overcurrent" (or rather whatever current does flow when an insufficiently resistive load is attached), can the package cope with all op amps in it doing this at the same time? Some of the datasheets say that the maximum current drawn by the whole IC at peak is the same as the max current on an output, does this mean all outputs actually end up giving lower output currents in to low-resistance loads so the total sums to the ICs total, or does it mean that while one op amp in the package being shorted on its output can be survived, all those in a dual or quad doing so would burn out the overall package?

Thanks

[Ice-Tea]

To what extent do op amps survive over-current on their output pins? The output pins have ratings given in the datasheet, typically around 20mA to 30mA for ones I've looked at, but the datasheets also often say that op amps are rated for having a short circuit on the output "continuously" (atleast for the MCP602* and MCP629*).

So does this mean they'd survive trying to drive a zero ohm short to VCC or Gnd (when used in VCC to Gnd as power rails config), and just not give the expected output voltage (as the limited current would alter the voltage which could be provided)? Or does it mean something else?

No, it means exactly that.

I know op amps don't like driving capacitative loads for feedback reasons, but do current considerations also mean the apparent short which a capacitor looks like (when empty) would cause a damaging current? Yet I see example circuits online, and even in books like Horowitz and Hill where an op amp's output is going straight to something like a 1uF non-polarised (must mean ceramic hence low ESR) capacitor with no resistive protection.

A few points to consider:

- an opamp has a slew rate. That will limit the charging current for the capacitor
- even if an opamp is not specifically rated for continuous short circuiting, it will probably be just fine for the short period of time required to charge a cap.

And for multi-op-amp IC packages (dual, quad...) if a single op-amp can cope with brief or long term "overcurrent" (or rather whatever current does flow when an insufficiently resistive load is attached), can the package cope with all op amps in it doing this at the same time? Some of the datasheets say that the maximum current drawn by the whole IC at peak is the same as the max current on an output, does this mean all outputs actually end up giving lower output currents in to low-resistance loads so the total sums to the ICs total, or does it mean that while one op amp in the package being shorted on its output can be survived, all those in a dual or quad doing so would burn out the overall package?

Depends. If the current drawn/opamp is the same as the short circuiting current it's fairly easy: current * Vcc * #opamps = Pdiss. That dissipated power has to be put in the thermal model of the IC and will tell you whether you're safe or not. It's also possible you'll draw quite a bit more than the output current from your supply pin. In that case I would expect some graphs/pointers in the datasheet as to how much current you'll be drawing under your circumstances...

[magic]

Sometimes they provide a fine print which helpfully informs you that the continuous short circuit rating is only valid for one channel in the package at a time.
Sometimes you have to do the math yourself to find out that the above is likely true.

I also suspect that there is plenty of chips that are rated to withstand short circuit but wouldn't survive it at elevated ambient temperature, say 100°C or maybe even 70°C.

edit
You mentioned some MCP parts, that's probably low voltage CMOS, knowing those guys.
Short circuits are less of a problem at 5V because power dissipation is much lower than on ±15V supplies or similar.

Speaking of which, another thing to watch out for is chips that are "short circuit proof" only if you short to ground, but not to the negative rail while driving high or vice-versa.

[MrAl]

To what extent do op amps survive over-current on their output pins? The output pins have ratings given in the datasheet, typically around 20mA to 30mA for ones I've looked at, but the datasheets also often say that op amps are rated for having a short circuit on the output "continuously" (atleast for the MCP602* and MCP629*).

So does this mean they'd survive trying to drive a zero ohm short to VCC or Gnd (when used in VCC to Gnd as power rails config), and just not give the expected output voltage (as the limited current would alter the voltage which could be provided)? Or does it mean something else?

I know op amps don't like driving capacitative loads for feedback reasons, but do current considerations also mean the apparent short which a capacitor looks like (when empty) would cause a damaging current? Yet I see example circuits online, and even in books like Horowitz and Hill where an op amp's output is going straight to something like a 1uF non-polarised (must mean ceramic hence low ESR) capacitor with no resistive protection.

And for multi-op-amp IC packages (dual, quad...) if a single op-amp can cope with brief or long term "overcurrent" (or rather whatever current does flow when an insufficiently resistive load is attached), can the package cope with all op amps in it doing this at the same time? Some of the datasheets say that the maximum current drawn by the whole IC at peak is the same as the max current on an output, does this mean all outputs actually end up giving lower output currents in to low-resistance loads so the total sums to the ICs total, or does it mean that while one op amp in the package being shorted on its output can be survived, all those in a dual or quad doing so would burn out the overall package?

Thanks

Hello,

Some chips have a single output rating plus a multiple output rating.
For example, 10ma per pin and 100ma for all pins, and that could be with a chip with 10 pins or with 100 pins.  For the chip with 100 pins that would mean that there could only be a max of 10 pins putting out 10ma, or 20 pins putting out 5ma, or 10 putting out 5ma and 2 putting out 20ma and 1 putting out 10ma, or any combination that totals up to 100ma.  If you go over 100ma that would put more stress on the power supply connections within the package which could blow out the chip entirely.  If you go over a single pin current rating the entire chip could blow out or just one or two outputs.  I've seen chips with just one output that did not work anymore while the rest of the chip worked fine, so it depends exactly what blows out or shorts or burns up inside the chip package as to how much damage occurs.

I cant imagine why anyway would want to connect a 1uf cap directly to the output of a op amp with presumably the other end of the cap connected to ground.  I dont see why anyone would do that because what would be the point.
What i can see is connecting a 1uf cap on the output with the other end being connected to the inverting input, which forms an integrator circuit or low pass filter and this might be fairly common.  That's a different arrangement because one end is connected to an input.  In that case when the output changes suddenly the output impedance is much higher for a moment and so the full current is not available yet anyway.  Apparently it works ok because there are a lot of circuits like that.
As suggested above, a point to think about is what is the output impedance during a transient.  One of the reasons for low output impedance is the feedback forces the output voltage to be the correct value based on the input and feedback, and the input takes time to change anything and the feedback takes time to make a change to the output also due to the apparent delay time within the op amp.  While this wont limit current indefinitely, it will for a short time, which may be part of what protects the chip.  Obviously it has to be able to handle some capacitive loading or they would all blow out.
Another point to think about is in an AC circuit the cap does not have zero impedance it has some finite non zero impedance which limits the current during pure AC operation.

I suppose you have to read the specifications carefully and may have to look deeper into a given application if you suspect there will be a problem.

[magic]

I cant imagine why anyway would want to connect a 1uf cap directly to the output of a op amp with presumably the other end of the cap connected to ground.  I dont see why anyone would do that because what would be the point.

I have done that. Using a remaining opamp channel as a low power linear regulator

[Infraviolet]

For the MCP602* MCP629* and MCP600* series op amps (low voltage, yes, and mostly for rail to rail use +5V to Gnd, useful in circuits which end up being powered from batteries or USB power banks, a lot more convenient than +/- >12V as a lot of older op amp examples use) I can't find any indication in the datasheets which makes it clear about how total supply current and per-op-amp output currents compare. There are graphs which look to show how the output shorted current, presumably from one op amp on the chip, will vary with environmental temperature, but nowhere can I find anything which says whether the maximum the whole chip can cope with is equal to the value of one output pin, or 4x the value of one output pin for quad op amp packages. There are certainly indications in there that shorting even one op amp of a single, dual or quad package at high temperatures could draw enough current to damage it, but nothing to really imply what shorting multiple op amps in a multi-op-amp package would do at lower temperatures.

You can get circumstances where an op amp drives in to an empty capacitor (starting off like a short to ground, in single supply scenarios where Gnd is also the negative power rail of the op amp) when using a peak detector (either the basic https://www.electronics-tutorial.net/wp-content/uploads/2015/09/Peak_D2.png type or the improved https://electronicscoach.com/wp-content/uploads/2018/07/improved-peak-detector-circuit-2.jpg ) configuration, the op amp drives through a diode to a parallel pair of RC (Rl in the first image, missing in the latter image), the sizes of the capacitor and resistor controlling how fast the peak detector drains away after peaking. Depending on the incoming waveform this could mean an op amp's output is regularly shorting in to an empty capacitor to charge it up. One would assume that as a capacitor, a low ESR one, will look like a short, then if this is being done on several channels of the op amp it could be demanding around 20mA (shorting current, approx, for all those op amp types listed at temperatures in the 0 to 30 celsius range) on several output pins at once. Consider if you had four peak detectors running together, either all of the first type within one quad chip, or if of the second type then consider one quad chip holding all the "A1" op amp stages and a separate quad chip providing the "A2" stages, shorting being confined to all 4 channels of the first quad package in this case. Can such an op amp survive these demands on a regular basis? Particularly if events in the incoming waveforms mean sometimes all of them peak together after a longer low period in which all have been low long enough for caps to have discharged.

[magic]

I think those short circuit ratings more or less boil down to the opamp being better than µA709 in that it limits its output current to a level which doesn't blow it up instantly. Then you are left with thermal problems. For a DC short they are easy to calculate, for repeating charging of capacitors you calculate how much energy is burned in the chip on one such event (you will end up with a constant that depends on capacitance and initial/final voltages) and then multiply by repetition frequency to get power dissipation per channel. Add all channels together to have an idea about the whole chip.

edit
That being said, I see that these chips have this unusual line in absolute maximum ratings:

Current at Output and Supply Pins ............................±30 mA

At face value this seems to imply that you shouldn't exceed 30mA power supply current under any conditions. And short circuit current is 23mA per channel on 5V so shorting more than one channel puts you outside this rating. OTOH, it could also refer to maximum permitted continuous clamping current of internal ESD diodes, like the maximum input pin current clearly does.

Sometimes exceeding current ratings of internal conductors can result in their damage by electromigration. At one time people noticed that some Pentium 4 CPUs overclock like crazy with little effort, and a few months later all those OC'd chips started to die like flies, even under good cooling. Apparently there was reason for the factory clocks being what they were.

Ask Microchip?

[EPAIII]

Thing is, you have to read the data sheet carefully and completely.

That being said, there is nothing wrong with TESTING a circuit. Many years ago, when I made my first power supply with a linear regulator, I read but did not completely trust the statement that it could survive a short for an indefinite period. So, I breadboarded it and turned it on and shorted the output. When I lifted the short it came back 100%. So, I tried it again. Same result. So, I tried it for a longer time, again with the same result. Finally, I turned it on, shorted it, and went home to dinner, TV, and sleep. The next day I checked it for one final time; it was OK.

I carefully read the datal sheets whenever I am using a new IC. And I test any circuit that I may doubt. The cost of most ICs is fairly low so one blown one in a test is not a big deal.

[MrAl]

I cant imagine why anyway would want to connect a 1uf cap directly to the output of a op amp with presumably the other end of the cap connected to ground.  I dont see why anyone would do that because what would be the point.

I have done that. Using a remaining opamp channel as a low power linear regulator

That makes sense i guess, and now that you mention it i have used one with the output connected directly to ground.  Can you guess why?  A lower power power supply voltage splitter.

[Infraviolet]

I've done some tests.

I set up an MCP6024 so two channels (B and C, the "rear end" two) were both taking in a 70Hz 50% duty square wave and then outputtng a 5V square wave, gain being around 1. I put 5.6 ohm resistors on the output pins and o-scope measured the voltage across them to get currents.

I found:
"shorting" the outputs to ground (same rail as the chips' supply ground) through small resistors, after the 5.6ohm measuring ones, never gave a current above 35mA on a single channel, however small the resistance was made. So the current limiting is broadly as the datasheet gives it. One channel did 32mA most of the time, the other did 27mA.
This was confirmed by measuring the input current to the chip (5.6ohms between the chip's +v pin and the 5V rail) showed around 59mA being drawn, twice what the datasheet says can be drawn by the chip overall.

So it would seem that each channel current limits itself to 30mA whatever one does. But the whole chip takes as much as needed for all the channels, and does not reduce the current limits on the separate channels when multple channels are demanding their maximum current.

I also tried this for the capacitor charging from an output example, as the cap started charging it drew 35mA for 100nS with some ringing in the current drawn as it rose. It then drew 23mA for a further 3uS, before the current demand decayed down to zero with a ringing pattern which never rose above 23mA again. When this was done on two channels at once the waveform on either of the was the almost same as if one channel was inactive and the other was outputting the 35mA charging pulse in to the cap, although when both channels were charging caps the ringing waveform was a litle slower (factor of 1.2 maybe).

I'm guessing for the chip overall 35mA *2 or even *4 (70mA to 140mA) for 100nS and 23mA *2 or even *4 for 3uS (46mA to 92mA) are probably survivable?

On the other hand I don't know what drawing 30mA on multiple channels long term could do, depending how that 30mA "at supply pins" of the datasheet (a datasheet shared between the one, two and four channel versions of the MCP602* chip) is to be interpreted. The chip seemed fine after several minutes of it on two channels (59mA draw by the chip overall) at 70Hz, 50% duty cycle.

[RJSV]

Ice tea seems to have it right, where it's the Power dissapation, that ultimately causes overheat related damage to the IC, and that's generally, meaning if you have 4 'packs' of separated circuit in there, it doesn't necessarily matter which one is generating excess heat, as they are all in proximity.
   If you are worried, about proper limits, that's fine...but it sounds like you wish to 'test' those:
   "What about if, on 4 channel IC, what if I run three of the channels, at 99% of 'safe' power dissapation, and then what if I BRIEFLY exceed spec. on fourth channel, to 104% of safe limits, but only for 91 % of maximum safe time, ...while exceeding a tiny amount, the voltage, but only for half the 'margins', etc etc etc
  Sure, what ifs help for learning, but maybe too many, too quick.

[magic]

The quad consists of two duals in one package, unless they changed something in recent years.
https://zeptobars.com/en/read/Microchip-MCP6024-CMOS-R2R-opamp-trimmed

I found:
"shorting" the outputs to ground (same rail as the chips' supply ground) through small resistors, after the 5.6ohm measuring ones, never gave a current above 35mA on a single channel, however small the resistance was made. So the current limiting is broadly as the datasheet gives it. One channel did 32mA most of the time, the other did 27mA.

I wonder if the 32mA channel was the left one, closer to Vdd?

This was confirmed by measuring the input current to the chip (5.6ohms between the chip's +v pin and the 5V rail) showed around 59mA being drawn, twice what the datasheet says can be drawn by the chip overall.

So it would seem that each channel current limits itself to 30mA whatever one does. But the whole chip takes as much as needed for all the channels, and does not reduce the current limits on the separate channels when multple channels are demanding their maximum current.

That's typical behavior of duals and quads.
What's not typical is the 30mA per supply pin absolute maximum rating

[Infraviolet]

I've tried asking Microchip, but don't hold out much hope they'll actually reply.

I also did some much longer tests with an MCP6004, and that seems to go fine for hours on end with an output current at maximum on two channels (50% duty, 70Hz), although the maximum current it will output is a bit less than the 6024 or 6294.

Magic: interesting comment "What's not typical is the 30mA per supply pin absolute maximum rating", not having sed that many different types in my experience so far, can I ask what sort of thing you'd think would be more typical among op amps. Thanks

[RJSV]

   A lot of standardized Engineering, at least from 1940's on, would frequently use the phrase:
   'Derate Specification maximums 10 %, for safety margin'...I mean, I guess you obtain some measure of efficiency, running a subsystem on 4 ICs, biased up at 98% of power supply, 95% of rated max current, rather than 'buying' 6 ICs for your planned subsystem, and, God forbid, run them at conservative design points,
and then get on with the whole rest of the design overview.
   Folks designing ships, high-rise buildings, hospital procedures, etc. ; They don't start out, at the furthest, ragged edge (of safety), as possible.  So...uh...are you, checking the absolute maximums, carefully, so that then, knowing those, you can, also, derate the design, carefully, (how about by 15 %?).
   Or, is the one margin enough ?
   The (limited) skills I learned, always appeared as Engineering as a profession, isn't just numbers; it's an approach, reliability, safety, testing, all come together, if that's what you seek. ?