GPIO ESR When MCU is Off

[meshtron]

I use the attached circuit to determine if my MCU was recently switched off - it provides a key piece of functionality for my board and works great (there is an off/switch upstream of my product that controls power to the whole board including the MCU).  DBL_CLICK connects to an ADC pin on my ATTiny88, and workflow is this:

• On startup, configure DBL_CLICK as an input
• Do an ADC read for voltage, compare to threshold
• Set dbl_click variable true/false based on comparison
• Reconfigure DBL_CLICK to an output
• Set DBL_CLICK high to recharge C6

As we get closer to a production-ready board, I'm looking to get rid of the 22uF cap and downsize to 1uF which is the largest ceramic/0603 cap in use elsewhere on the board.  The math says this would work if I upped R8 to 1MOhm, but I'm not sure about what the effective resistance between the DBL_CLICK pin and GND might be when the MCU is off.

Page 60 on the datasheet (linked above) shows the GPIO effective equivalent circuit has a cap to GND.  That cap will have some ESR, but I'm not sure where in the datasheet to look (or if it exists in there) what that ESR might be, especially when power is off.  I'm concerned that with a 1MOhm resistor to keep my smaller cap discharging slowly, leakage through the MCU (and maybe even back through the +5V switching regulator) will come into play.

If the answer is "you need to test it out and find out" that's fine and I'll do just that.  Just wanted to check with those who know more to see if there is something in the datasheet I'm missing that would help me make this call without experimenting OR if it's just something I shouldn't be worried about because a powered off MCU is close enough to an open circuit that even 1MOhm is still the most viable path.

Thanks!

[Manul]

Regarding your main question, I understand what you are asking, but there is no such thing as GPIO ESR when MCU is off. You need to look at it as separate elements. One is DC resistance - almost infinite for small voltages. Second is capacitance - typicaly very small, around 5pF. And last are ESD protection diodes going to ground and positive supply rail. If MCU is not powered, diode going to positive supply rail will turn on and will be sinking current into the power rail anytime if GPIO voltage is above 0.6V. The power rail will typically rise a little and so the GPIO voltage. That's basically what constitutes the behaviour of typical unpowered GPIO.

Regarding your implementation, I understand that it worked for you, but that is not a very good approach. Mainly because of what is stated above. I would probably do something like replacing R9 with a small signal diode in series with small resistor, so you can only charge the cap, but not discharge it, all backflow is blocked. Now the discharge is only through R8 and you don't need to worry about nothing else. How to read it? You can't measure voltage of it, but you can measure if it's charging or already charged. Simplest is to activate GPIO pullup and read the digital state of GPIO. So no ADC involved. Measuring time of how fast it reaches 1 then gives you an estimate of how much charged it was before you started charging. There are variations of this technique, but in any case it should give much more consistent and predictable results than current strategy.

[madires]

Have you seen the clamping diodes in the I/O pin equivalent schematic? When Vcc drops below the voltage of the external cap (minus the clamping diode's Vf) the cap will be discharged via the top clamping diode. But it shouldn't go below the diode's Vf (some tiny leakage current will still flow).

[meshtron]

Okay interesting.  So, because the +5V rail voltage will drop away faster than my cap voltage, I'll actually bleed power that way.  Makes sense, hadn't thought of that.

I think it's worked well so far just because the shutoff process is likely consistent and I can simply tune the voltage threshold to get the "feel" how I want.  But, @Manul your point makes sense to me and I think that would be an easy enough change.  Then the one resistor has "total control" over how fast I discharge and - to your point - I can get consistency without having to mess with it much in firmware.

Thanks for the input!  Too late for this batch of boards, but my next and hopefully last revision will be adding a bit more input protection and I'll play with adding the diode and reworking this section as well.

[DavidAlfa]

You should mention the timeout period you're trying to detect!

Pin input leakage current is 50nA typ. (About 20MOhm) so you can use 1M or even 4M7.
Skip the discharge resistor, as the pin ESD diode will do the same job through the input resistor, behaving similar to a diode connected to gnd when there's no power (Discharged VDD), but only for very small currents!
Definitely few uA won't cause any issues. Few mA might power the VDD rail if the load is very small. Obviously, currents larger than the absolute ratings (40mA) will damage the diode, usually shorting that pin to VDD/GND depending on the damaged diode.

To use the ADC with high impedance inputs, add a small cap (1-10nF) next to the pin (C1 here), so the adc sampling capacitor (Typ. 8pF) gets charged very fast.
Otherwise, the ADC adquisition time will need to be increased. In this example, 5RC =  5*3.3M*8pF = 132us, add a bit more because you never know, 200us. (Still, 200us is probably ok here?)
With that 1-10nF cap, the energy is readily available, so transfered almost instanty, maybe in 10-20us, depending on the internal switch resistance and other adc characteristics.

Or you could simply use it as digital GPIO input, knowing VIL is max 0.3 x VDD (You'll have to test this out?), you only need to adjust the capacitor and/or the resistor, then if the pin reads 0, timeout!
Thought not providing any way of adjustment like adc + software does.

[meshtron]

You should mention the timeout period you're trying to detect!

Thanks for the thoughts, David!!  Target timeout period is something just over 1 second.  There's a "feel" to it, but ends up around 1.25 seconds or so.  And yeah, for now I just tweak the voltage threshold so that it kicks in when it feels right.  And, once I've set that (on a specific board/component set) it is rock steady at least from a user perspective.  As the name implies, this implements a "double-click" type functionality.  So, if it's too long it feels like you have to wait forever for another "single click," but if it's too fast, depending on the switch type, it can feel hard to get it fast enough.  Regardless - the window is wide on the scale of uS!!

On your other comments - that sounds exactly like what I was hoping for.  Leakage current is what I was asking about (though with the wrong terms) and ~40M is the number I was after.  I see/hear terms like "near infinite" but I assume there MUST be some value above which I'm approaching that "near" thing!

There's part of me that likes being able to tune this via firmware, but in reality, once I've got it set, it's not something that should need to be adjusted.  So, I will run it as-is (ended up just buying some 22uF caps to try), maybe test it with a 1uF cap and a 1M resistor to see what I get, and decide if there's any value/reason in adding more parts and/or changing it up.

Thanks again for the insights, much appreciated!

[Manul]

Typical leakage current is good to know, but it has variations from part to part, also depends on temperature and DC bias, not linear, can be also a positive value (on powered IC). Normally it's not a purposely designed parameter, you can call it a defect of integrated circuit. Idealy it should be zero, but never is. So when we use an IC we try to design our circuit in such a way, that it has minimal effect. Thus it is recomended, that maximum leakage currents are one or two orders of magnitude smaller than the currents we are working with. But it's not that we can treat it like a simple equivalent resistance of predictable value. Relying on this value and using it as a functional part of circuit should not be done. For unpowered IC leakage will be very non linear, exponential in fact, due to diode curve.

[DavidAlfa]

What about setting the mcu in sleep while running a low power, 1 second wake-up timer?
When the mcu wakes up, check whether it was caused by a button or the timeout.
If it was the timeout, then remove the power entirely.

[meshtron]

What about setting the mcu in sleep while running a low power, 1 second wake-up timer?
When the mcu wakes up, check whether it was caused by a button or the timeout.
If it was the timeout, then remove the power entirely.

For this version, I only have 3 possible states: OFF, ON, ON_DCLK.  So, I would have to add elements to provide power to keep me alive for 1 second.

[SeanB]

Would also suggest using 3 1uF capacitors in parallel, as the 1uF might be closer to 300n at 5V, so 3 will be needed anyway to get somewhat decent charge storage. 2 extra capacitors on an existing reel, likely the PNP will drop more than that per reel anyway, and will also allow you to use alternate values as well.

[DavidAlfa]

For this version, I only have 3 possible states: OFF, ON, ON_DCLK.  So, I would have to add elements to provide power to keep me alive for 1 second.

And can't you leave it ON for ine second (But the MCU going into sleep mode) waiting for a timeror key press?

[meshtron]

And can't you leave it ON for ine second (But the MCU going into sleep mode) waiting for a timeror key press?

The switch is upstream of (and not part of) my board, and is switching a load downstream of my board.  So, when it goes "OFF," I lose all power instantly - no opportunity to delay except what I'm doing here which is let a cap slowly dissipate in case we get switched ON again within ~1 second.