Electronics > Beginners
Understanding the IR2110 half bridge driver
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T3sl4co1l:

--- Quote from: ZeroResistance on April 05, 2019, 06:49:31 pm ---I want to cross check the behavior of the circuit just to get an approximation if it works, its a simple half bridge driver. But I would like to check the rise times and fall times at the gate and the peak gate charge current?

--- End quote ---

How accurately do you want to know these parameters?

What transistor do you want to drive?  How fast (t_r/t_f and Fsw)?

Estimating gate rise/fall is very easy.  Take Qg(tot), divide by Vgs(on) (typically 10V) to get Cg(eff).  Combine Cg(eff) with R_G + (driver's R_out) to get the gate drive time constant.  The rise or fall time will be about twice this.  About half of which is likely during the Miller step.  (Driver R_out isn't specified, but you can guess it's around R_out = V_bs / Io(pk), or ~6Ω here.)

More precisely, take the RMS sum of this time constant plus the rise/fall time of the driver itself, since it's not perfectly fast of course.  This is around 25ns for a 1nF load (equivalent to a ~10nC gate).  It's not obvious how much faster it is for smaller loads.  (That's a 6ns time constant which would give a ~12ns risetime, so the driver risetime may be closer to 20ns.)

Any more precise than this, and you are -- actually, even at this level of precision -- you are fully at the mercy of component variation.  The driver's rise time spread (due to manufacturing and environmental variations) is probably something like 15-35ns.  The transistor is probably something like, for example, 24 to 56nC, with 43nC typical, or whatever.  The exact figure varies with drain voltage, too.  The error due to properly accounting for nonlinearities in the circuit (the driver isn't actually a constant 6 ohms at all output voltages; the transistor gate's capacitance varies with voltage) is comparable.

For a graphical version, you can basically draw a typical gate waveform, and scale the axes proportional to these numbers.

Is this satisfactory? :-+

SPICE simulation is good for getting a feel about more complicated behavior, like circuit parasitics; but that's a more advanced topic and requires understanding where to put parasitics in, and of what values.  It's also just as sensitive to the quality of the models used; even manufacturers themselves don't always get them right.  The only solution is to test and compare.  Putting together a good model takes a lot of care!

Tim
ZeroResistance:

--- Quote from: T3sl4co1l on April 06, 2019, 06:45:07 am ---
--- Quote from: ZeroResistance on April 05, 2019, 06:49:31 pm ---I want to cross check the behavior of the circuit just to get an approximation if it works, its a simple half bridge driver. But I would like to check the rise times and fall times at the gate and the peak gate charge current?

--- End quote ---

How accurately do you want to know these parameters?

What transistor do you want to drive?  How fast (t_r/t_f and Fsw)?

Estimating gate rise/fall is very easy.  Take Qg(tot), divide by Vgs(on) (typically 10V) to get Cg(eff).  Combine Cg(eff) with R_G + (driver's R_out) to get the gate drive time constant.  The rise or fall time will be about twice this.  About half of which is likely during the Miller step.  (Driver R_out isn't specified, but you can guess it's around R_out = V_bs / Io(pk), or ~6Ω here.)

More precisely, take the RMS sum of this time constant plus the rise/fall time of the driver itself, since it's not perfectly fast of course.  This is around 25ns for a 1nF load (equivalent to a ~10nC gate).  It's not obvious how much faster it is for smaller loads.  (That's a 6ns time constant which would give a ~12ns risetime, so the driver risetime may be closer to 20ns.)

Any more precise than this, and you are -- actually, even at this level of precision -- you are fully at the mercy of component variation.  The driver's rise time spread (due to manufacturing and environmental variations) is probably something like 15-35ns.  The transistor is probably something like, for example, 24 to 56nC, with 43nC typical, or whatever.  The exact figure varies with drain voltage, too.  The error due to properly accounting for nonlinearities in the circuit (the driver isn't actually a constant 6 ohms at all output voltages; the transistor gate's capacitance varies with voltage) is comparable.

For a graphical version, you can basically draw a typical gate waveform, and scale the axes proportional to these numbers.

Is this satisfactory? :-+

SPICE simulation is good for getting a feel about more complicated behavior, like circuit parasitics; but that's a more advanced topic and requires understanding where to put parasitics in, and of what values.  It's also just as sensitive to the quality of the models used; even manufacturers themselves don't always get them right.  The only solution is to test and compare.  Putting together a good model takes a lot of care!

Tim

--- End quote ---

This is mind mindbogglingly amazing!!
You never cease to amaze me T3sl4co1l  :-+
I'd like to hear your story, regarding you journey to master your trade, if you have a blog or something pls do share.

BTW I was looking to drive various configurations of Half bridge one is the standard one, and one is with dual supply, how would you drive the mosfets in a dual supply Half bridge configuration, they would need transformer drive , correct?
MagicSmoker:

--- Quote from: ZeroResistance on April 05, 2019, 05:48:20 pm ---1. So, the supply has to isolated?? I did miss that.
2. Like you said you don't like the bootstrap driver IC's which one's do you prefer and can you provide a few part numbers.
3. What is a proper floating high side driver?

--- End quote ---

1. To turn on a MOSFET (or IGBT) you need to drive its gate with a voltage about 10V higher than its source (or emitter), but the source/emitter of the upper (or "high side") switch is not referenced to ground (or common) unless the lower switch is on, and when the lower switch is on the upper switch must be off.  So, you either have to use an isolated power supply for the upper switch, or a bootstrap driver IC like the IR2110.

2. I generally roll my own gate driver circuits using a variety of approaches depending on power level, how high an isolation voltage is required, etc., but for a beginner I would recommend using an isolated gate driver IC like made by Silicon Labs* or Analog Devices' ADuM series, etc., and one or two small 1W - 2W potted dc/dc converter modules for supplying isolated power to the upper and, optionally (though highly recommended) lower switch gate drivers. Note that while you don't technically need an isolated supply for the lower switch, using one anyway allows you to fully isolate the control and power handling sides of your circuit which vastly improves the reliability, noise-immunity and safety; note that none of these advantages accrue from using a bootstrap driver.

3. See above.


* - e.g., Silicon Labs Si8232 https://www.mouser.com/ProductDetail/Silicon-Labs/SI8232BB-D-IS?qs=sGAEpiMZZMvQcoNRkxSQkmAXKPf7n2%252BxDWshxPYbuYg%3D
ZeroResistance:

--- Quote from: T3sl4co1l on April 06, 2019, 06:45:07 am ---Estimating gate rise/fall is very easy.  Take Qg(tot), divide by Vgs(on) (typically 10V) to get Cg(eff).

--- End quote ---

Why do we take Vgs(on) here instead of the actual gate driver supply voltage?. I mean if we are providing the gate driver a supply of 15V should we still consider Vgs(on) of typ. 10 for the above calculation?
ZeroResistance:

--- Quote from: T3sl4co1l on April 06, 2019, 06:45:07 am ---
More precisely, take the RMS sum of this time constant plus the rise/fall time of the driver itself, since it's not perfectly fast of course.  This is around 25ns for a 1nF load (equivalent to a ~10nC gate).  It's not obvious how much faster it is for smaller loads.  (That's a 6ns time constant which would give a ~12ns risetime, so the driver risetime may be closer to 20ns.)

--- End quote ---

Just looking into the math here.
Time const = 6ns
Driver rise time = 25ns
RMS sum = sqrt((25^2 + 6^2)/2)
= sqrt((625 + 36)/2)
= sqrt(330.5)
= 18.18ns rise time

Would this be correct instead of the above mentioned ~12ns rise time
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