Author Topic: Understanding transistors  (Read 17774 times)

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Offline rstofer

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Re: Understanding transistors
« Reply #50 on: May 20, 2017, 04:25:26 pm »
The reason your simulation doesn't work is that 8k resistor.  Even with only 1 mA flowing, that resistor drops 8V.  Then a drop for the diode, the transistor, etc, and you're down to just 1V on the output.

The 14V output doesn't have a dropping resistor and it seems to work.  You need to substitute 2 or 3 diodes in series in place of the 8k resistor.

ETA: the 47k resistor is also redundant.
« Last Edit: May 20, 2017, 04:42:09 pm by rstofer »
 

Offline Zero999

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Re: Understanding transistors
« Reply #51 on: May 20, 2017, 04:33:45 pm »
That's one possibility or you could replace the variable resistor with a potential divider, say for 12V, then use a transistor to connect another resistor in parallel with the lower resistor to bump the voltage up to 14V. Then you should be able to simplify things by using the CD40109 and CD4096.



Ouch - this is quite a bit above my current capabilities to understand/use.  Btw. speaking of quickly skimming the data sheet, I just realized that deep in the datasheet of the AT28C64B there's a 12V requirement for erase ... *sigh*
Don't worry, it won't work anyway. I forgot that you need to be able to draw 30mA from the 14V rail and the CD40109 can only source a few mA.

Apart from that, it's not complicated. The CD40109 is just a level shifter. It converts a voltage between 0V and VCC to 0V and VDD. It has another enable input, which turns both output transistors off when connected to 0V, or to VDD or GND (depending on the input) when it's at VCC. It's known as a tri-state buffer and when the enable pin is low (0V), the output is a high impedance, like it's disconnected from the IC (open circuit), when the enable input is high (VCC) the buffer works as usual.

In the previous circuit diagram, the L input goes to the level shifter's input and the M input goes to the level shifter's enable, via a logic inverter, and is connected to the output via a diode. When M is 0V, the inverter causes the enable pin, on the level shifter, to be high. The output will then change between 0V and HV, depending on the voltage on L. When M is connected to 5V, the enable pin on the level shifter will be low, causing it to be disabled, its output disconnected from the circuit and 5V, from the M input flows to the output, via the diode.
 


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