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USB power filter inrush current problem

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I'm trying to implement a filter on my power line (coming from a 5V@3A USB wall adaptor).
The idea is to filter the power against high frequency noise (>100Khz) and fed it to 2 separate 3.3V LDOs (250 mA each) and to a Raspberry Pi (up to 2A) thus I'm needing a big bulk capacitance on one end of my filter as shown in the schematic:

The problem with it is that I get huge inrush currents on my damping resistor and possibly on my LDOs too (assuming RPi already has a mechanism to overcome it) as shown below.

What can I do to protect my components against this?

PS: I deliberately didn't use an electrolytic cap as I can't seem to find reliable data on their ESR values and no SPICE models to test. So I thought it's better to implement my own damping resistor with the biggest MLCC I can find.

Did you configure your simulation voltage source to have a realistic internal series resistance?

Could you use an RC timer and a high-side PMOS in the simulation to delay the load's turn-on time? What you're seeing is probably not representative of what a real circuit would do.

I didn't have a series resistance setup. I'm using piecewise linear voltage source so I can acutally precisely setup rise time. At the moment I have it set up at 5V in 1us (it rises linearly). What would be a realistic rise?

How much greater than 100kHz? Might be better off with an inductor over a ferrite bead.

Normally with USB device you'd want to limit to 10uF. But considering you're powering off a USB supply, should be OK with a few hundred uF of electrolytic capacitors. One on the input and one on the output (CLC).

More to the point, a ferrite bead won't do anything at 3A, due to saturation.  You need a special model to see that; almost all FB models are AC only, and often poorly fitted at that (like, single RLC).  (At least, not *any* plain text models that I've seen; I've had to build them myself!)

Not sure what the ramp rate is modeling; a hot-plug event is much faster (mechanical connections close in sub-ns, at least to some degree of "close") but also requires modeling cable inductance (figure ~0.5uH/m of length), and probably source capacitance too.  Ramp rate of the supply itself (startup) is likely to be some ms, negligible for dynamics here.

Chargers are often a bulk cap directly off a flyback converter, so the output ripple (DM) can be pretty mediocre, but also most loads won't much care (e.g. more regulators).  So first of all, you should have that justification in place: how much ripple do you really need, and at what frequencies?  Otherwise the filter can be the trivial case -- an utter passthrough -- and I mean that as engineering best practice, because, without a need, there's nothing to engineer, good job, next!

As for CM (common mode), this filter does absolutely nothing -- and CM is often the worse thing at higher frequencies (MHz+) and for signal purposes (where high frequencies get rectified into low-frequency noise or DC offset).  That can be trickier to deal with, because chargers often skimp quite severely on filtering in the first place, and also tend to use a relatively large Y-cap meaning there's significant AC mains leakage (fractional mA) -- the latter is what causes the tactile vibrating / rubbery feeling you may get when handling a cellphone on the charger.



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