Choosing and Programming CPLDs + Programmer

[HardBoot]

CPLD dev boards with built in programmers cost a lot, especially when you want several CPLDs.

I'd like to get DIP+PLCC CPLDs which I can socket then put into perfboard and wire-wrap everything for prototyping and then move them over to a proper PCB, skipping breadboard since it's no good at high frequencies and prevents me from using PLCC.

I'm not interested in FPGA because it's more complex than necessary and timings can be funny, the CPLDs are for very specific tasks where latency dictates performance.

What am I intent on making? A very oldschool computer, with CPLDs instead of discreet components, decently high operating frequency.
1 CPLD for core CPU (crude instruction pipelines with task management)
1 CPLD for extended instructions, fixed-point number format math.
1 CPLD for VGA, simple dumb single-buffer RGB5 800x600 75Hz, would need the thing clocked at 72 MHz for that, could live with 640*480, much easier.
1 CPLD for everything else, PS/2 Keyboard, parallel, serial.

I've used Quartus Web Edition a little, is ISE WebPACK easier to use when designing things by hand(logic gate level)? Everything I'm doing is nightmare-tier in verilog/vhdl unless I wanted to eat massive amounts of sillicon space and go slow, some things aren't too bad though.

So... Altera or Xilinx... or Lattice... I don't know anything about them but all 3 seem to have CPLDs that'll get the job done, really a matter of which suite is simpler.
Is there a general purpose programmer(USB-JTAG device) that'll work across the board for cheap?

[TerminalJack505]

I don't want to discourage you but you might have trouble getting that much functionality out of traditional CPLDs.  Especially CPLDs that come in low pin-count packages.  Your particular application will need fairly high logic density but the problem is that manufacturers typically limit the number of macrocells based on the number of I/Os.  The best you can get is approximately 2 macrocells per I/O.  So you're looking at a maximum of 64 to 72 macrocells per 44-pin PLCC.

Altera and Lattice make 'CPLDs' with higher logic density than traditional CPLDs but these are really just FPGAs with built-in flash.  None of these come in DIP or PLCC packages, anyway, so they wouldn't be an option in your case.

So far as CPLD programmers go, the only ones I can vouch for are Digilent's.  I've used their "JTAG Programming Cable" to program Xilinx CPLDs without any problems.

[HardBoot]

Well so far the only thing I've "played" with is the VGA card, just simulating it being driven by a pic, the simple little CPLD is just smart enough to read from sram and spit out the result, so the more complex task, the cpu... looks like I'll need at least 2 just for the base.
This guy got a cpld to generate an image on the fly rather than read from memory.
http://www.pyroelectro.com/tutorials/fpga_vga_resistor_dac/

If I have to go FPGA, I will, external programming memory has some advantages.

Big concern is the design suite, Quartus isn't bad, but not amazing, I could get by with it but it's not really Logisim-simple... the program I used to design some things when mucking around with designs.
Wish there was a logic gate design standard format...

[krenzo]

I'm not interested in FPGA because it's more complex than necessary and timings can be funny

Actually, using a combination of CPLDs would be more complex than necessary.  Why make things harder for yourself?  Just get an FPGA (preferably a Digilent dev board).  I recommend the Spartan 6, and program your different chips into as if they were separate CPLDs with a bus to communicate.

[HardBoot]

I'm not interested in FPGA because it's more complex than necessary and timings can be funny

Actually, using a combination of CPLDs would be more complex than necessary.  Why make things harder for yourself?  Just get an FPGA (preferably a Digilent dev board).  I recommend the Spartan 6, and program your different chips into as if they were separate CPLDs with a bus to communicate.

Well it's really to demonstrate the software's ability to keep running even if I ripped a component out, it'll continue running, some functions could also be done in software when hardware was taken out.
I could have external switches/jumpers which disconnect the hardware inside the FPGA.

Are there cheap FPGA boards that are completely devoid of features and just have 2+ RAM chips on board? If I wanted CPU and VGA in one I'd need quite a bit of memory bandwidth, and DRAM is pretty laggy compared to SRAM but has more throughput, would have to do a lot of caching in the FPGA.

[joelby]

Have a look at my list of Cheap FPGA development boards.

I can't think of any cheap ones that have two RAM devices, but you could attach an extra external SRAM if DRAM is too complicated to use for two things at a time. The Xilinx Spartan-6 memory interface generator, for example, gives you multiple R/W ports for a single RAM device, but you will need to consider latency and the need for caching.

[HardBoot]

Some of those boards look good, but it's hard finding datasheets on the ram and the real world performance with the integrated controller on spartan 6.
Memory latency hurts performance when working on big things, but smart caching helps things dramatically.

Some of the boards have 32-bit single chip running at 200Mhz, that would be plenty fast enough for me if it actually could do 4 bytes per clock of I/O, I need about 300MBps read, 100 MBps write, minimum.

[HardBoot]

So after messing around I've decided to get two FPGA boards each with RAM, rather than one FPGA(since I'd be memory limited unless I then added on more) or have several CPLDs with an array of SRAM(could work but would take ages to assemble and be clock limited).

I only need an FPGA board that's two things; cheap with a fast RAM chip, don't need that many gates since my CPU design isn't a monster.

Terasic and Digilent... may cost too much because I can't get academic prices.
DE0-Nano, may be a winner, if I knew what kinda performance I could get out of the RAM.
Nexys 3, what the hell is that puny 16MB of RAM, DRAM with everything built in so it acts like a big slow async SRAM?

[joelby]

For more information on the Spartan-6 memory controller, have a look at UG388. At the highest speed and with DDR2/DDR3, it will do 800 Mb/s per bit, so on a board with 16-bit RAM (such as the Digilent Atlys), the peak bandwidth is 12.8 Gb/s.

[hlavac]

I bought the Terrasic DE0 Nano to get my feet wet in VHDL/Verilog.
Only have two complaints:

• Low speed connectors. Well maybe thats a good thing, makes it easier to connect stuff. Slow stuff.
• Crappy built in linear power supply for the 1.2V, specified at 0.654A, making the board exceed the allowed USB supply current and wasting a lot of power. For a board touted for robotics and thus most likely battery powered this is pretty ridiculous!

On the other side, the Quartus II looks relatively usable.

[TerminalJack505]

If you're still looking to go with PLCC then you might check out what these guys have to offer.  They mount FPGAs and high logic density CPLDs onto 68-pin PLCC socket-compatible boards.  The prices are a bit steep, however.

[HardBoot]

I bought the Terrasic DE0 Nano to get my feet wet in VHDL/Verilog.
Only have two complaints:

• Low speed connectors. Well maybe thats a good thing, makes it easier to connect stuff. Slow stuff.
• Crappy built in linear power supply for the 1.2V, specified at 0.654A, making the board exceed the allowed USB supply current and wasting a lot of power. For a board touted for robotics and thus most likely battery powered this is pretty ridiculous!

On the other side, the Quartus II looks relatively usable.

DE0-Nano... how slow are the I/O pins? I'm not too interested in high speed serial stuff, I'd just need decent connect speed to to communicate data to the other board which would act as a video card.
I could use up 16+16+2 pins just for that.
It says:
Two 40-pin Headers (GPIOs) provides 72 I/O pins
One 26-pin header provides 16 digital I/O pins and 8 analog input pins to connect to analog sensors, etc
Are all of the I/O pins the same speed?
I'm guessing those 8 analog are ADCs only... could be useful though, read voltages, power, audio input.
I guess I'm leaning for the DE0-Nano unless there's a cheap Spartan 6 board that has good memory... all of the ones under $100 seem to have really junk memory, even worse than the DE0's ancient chip.

If you're still looking to go with PLCC then you might check out what these guys have to offer.  They mount FPGAs and high logic density CPLDs onto 68-pin PLCC socket-compatible boards.  The prices are a bit steep, however.

Having a PLCC module like that would be really nice, but that costs more than a board. :0
Wish they went with a bigger PLCC, 68 is enough, but I'd use about 40 of the 50 IOs on memory, which means I'd only have enough room left for an 8-bit bi-directional data bus.

Someone really needs to make an FPGA board which is nothing more than a board of 96 2.54 IO pegs, ddr3 simm, jtag, and power connector, nothing else, no adc, no dac, no accel... found one just like that and they wanted $400... $40 chip, $<10 board, $<10 of bits, $>340 markup.

[hlavac]

I think you have the men with the cold eyes from the
US technology proliferation and export control programme to
thank for total lack of usable small and cheap FPGA boards...
You could put that into a missile or something, you terrorist

[hlavac]

As for DE0 Nano, seems like a good toy, the connectors are standard 0,1" headers...
You can forget high speed serial like SATA, the Cyclone IV on it is the E model so it lacks the transceivers anyway...
Good for general learning and simple applications...

I miss high speed communication with PC, considering making USB 2.0 high speed daughter board for it if the connectors can handle it (parallel bus)

Looking at the board underside, looks like the linear power supplies are connected thru 0ohm resistors and there are footprints for jumpers there so you can probably roll your own proper switched power supply for the power rails...

[hlavac]

Sparkfun used to have Spartan 3E FPGA board but they don't stock it anymore...

[HardBoot]

Sparkfun's prices are pretty garbage, TONS of Spartan 3 boards out there for $70, generally good quality stuff though.

I guess I'll go for the nano... who needs high frequencies when you have lots of bandwidth, just gotta get a really fast shift chip, maybe the onboard pll can output a fast signal, otherwise just use a crystal and have the fpga noted when the chunk has been sent.

I like having male 2.54 headers instead of female like soo many boards(cough arduino)... you can wire-wrap directly onto male 2.54's and get great electrical contact, and on the other end you can solder the wire straight onto a proto board, could also use shielding.

I know missiles use micros.... beyond that it varies wildly... damn things cost so much they better be using asics and not fpgas.

[T4P]

wire wrap ... i hate wire wrapping
I use those female to female connectors and attach a loose wire 

[HardBoot]

wire wrap ... i hate wire wrapping
I use those female to female connectors and attach a loose wire 

Female jumper wires are just fine, but wire wrap is better, if you wanted even better you'd have to solder the wires on... wire wrap wire is also cheap.
Jumpers can be annoying since premade ones are never the length you want.
Generally I only solder a final circuit, I don't solder at all when messing around with things.
Breadboard is electrically inferior to wire wrap, so I use perfboard and wire wrap stuff... soldering is perhaps a bit faster, but desoldering takes a lot longer than ripping off a wire.

[hlavac]

In this case I would get a female connector and solder the wires to it, then plug the other end of the wire into breadboard as usual.