LTSpice 1/f Noise Simulations

[fourierpwn]

Hi again,

I am trying to simulate 1/f noise in LTSpice for any nMOS or pMOS device. There is a noise simulation example given on LT's website however that involves an op-amp and I am unsure as to how to run such a simulation for a MOSFET device.

Any help would be most appreciated 

[fourierpwn]

I thought I'd add some more information.

Here is the example of the noise analysis example given by LT.



Here is what I have done to translate this example over to a MOSFET.
Note: The biasing of the MOSFET (VDS=1V and VGS=1V) has been changed from 0-20V with no difference in the simulation output. I have tried several different MOSFET devices to ensure that I had a model that included noise parameters too.



Thoughts?

[basinstreetdesign]

Well, the first thing that strikes me is that Vout is clamped to 1.000000000000 V by Vds.
Vds is mathematically noise-free so will exhibit none.
Try sticking a resistor between the drain and Vds.  1 Ohm will do and you may multiply the output voltage by whatever actual resistance you may be interested in.
Or you can monitor the drain noise current instead of its voltage.