Very high level. You only pick what components you want: CPU cores, IP blocks. It's the system's/SiFive's responsibility to make sure it works. The user does nothing about layout, nothing about electrical characteristics. More like some of the high level drag-and-drop FPGA tools, except it's for SoCs.
Ok! so as I understand it SiFive's Chip designer will also help in assembling the IP blocks for Analog peripherals like ADC / DAC? apart from the regular uC peripherals like counters/timers, capture/compare, DMA etc.