Electronics > Beginners
Weird switching topologies you don't see anymore
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T3sl4co1l:
Here's one I just thought up.  Intent: get a boosted output (Vo(max) > Vin), where you would otherwise also need a current-output buck converter (say for powering a current-fed bridge).

So, we need something like a hybrid of a flyback or SEPIC, to get the boost, but a choke-input filter to get the CC output.



Let me back up a moment --

When you drive a CT inductor with a switch on one side, and a diode to ground on the other, you get simple full wave operation, but with no drive strength during the off state, because, yeah, it's just the magnetizing inductance discharging during that phase.

Like the AC supply portion (top left) of this,



Looks like a PP bridge but with a passive diode on the other side.  That's all.  I think it's often called a "quarter bridge".

Well in the above circuit, the diode's been moved to the VIN side.  Note the phasing on the primary, and the top secondary.  The secondary and diode have simply been swapped, breaking the CT, but keeping the behavior perfectly identical.

Suppose we add a third winding, opposite phase, so that it delivers positive voltage while the switch is on?  We can dump this into a filter inductor, and we get an ordinary forward converter, no problem.

What if we put in one more diode, from the demagnetizing winding (the diode side of the PP quarter-bridge) to the output inductor.  If the waveform stays perfectly square (excess magnetizing current being clamped by D1), then VOUT can vary between 0 and VIN, for DRV duty of 0-50%.  It's got gain, which is interesting.  Though it doesn't have voltage gain, so it fails the first thing I was looking into (boosted buck).  But the curiosity continues:

If I(L1) > I_M (magnetizing current; we have to sum the currents over all windings of T1, since we can't measure just one as we can with a single-winding inductor), then L1 will dominate, and force T1's voltage to zero (the rectifier node will be pushed below 0V, clamping both winding phases to equality, in other words zero).  Which freezes I_M (EMF = 0 so dI/dt = 0).

Eventually, L1's current discharges to I_M, and the rectifier node voltage rises.  What does it rise to?  How long does it stay there?

I don't think this topology is very useful, but it's an interesting riddle.  I may breadboard or SPICE it later, just noting it down for now!

Tim
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