What does 2x22µF mean?

[cmumford]

In the AP63205 datasheet, the sample schematic has what I think is an output decoupling capacitor, but it's labelled "2x22µF". What does "2x" mean? Should I have two 22µF capacitors in parallel, series, or something else?

[gamalot]

Means two 22uF capacitors in parallel.

[rooppoorali]

It means two 22µF  capacitors. I am wondering, why the author didn't draw two capacitors in parallel instead.

[cmumford]

Yeah, I figured it's just an uncommon shortcut notation used by this company. I just wanted to check before making any boards.

I'm also curious why the datasheet doesn't specify a single 44µF capacitor. Is it because 22µF is a standard cap value, but 44µF is not, or is there an electrical reason why two 22's in parallel is better than a single 44?

[JohanH]

In most cases, the difference between 47 µF (which is the standard value) and 44 µF doesn't matter. What matters more in this case is having two capacitors in parallel, which effectively halves the ESR.

The data sheet also says:

"An output capacitor with large capacitance and low ESR is the best option. For most applications, a 22μF to 68μF ceramic capacitor is sufficient."

You will probably fine with a single low ESR capacitor, although it could be more expensive than using two "cheap" capacitors.

Then it also depends on your specific application. Use the formulas provided in the data sheet to find out.

If you are creating a one-off product, it doesn't matter much, throw a lot of low ESR capacitance on it (but do not exaggerate). If you are planning for production, consider which components are available and what will be a cheap option, of course so it still fulfills your demands (i.e. allowed ripple level etc.).

[ledtester]

I'm also curious why the datasheet doesn't specify a single 44µF capacitor.

The datasheet probably specifies a minimum capacitance so anything above a certain value is recommended.

Also, parallel caps generally have a lower ESR than a single cap.

Finally, the selection of 22uF caps might be due to BOM optimization -- i.e. reduce the number of different cap values for the entire board or due to cost or supplier.

[fourfathom]

Also, the 2X may be because most MLCC chip capacitors will have an actual lower capacitance when operated near their voltage rating.  For example, the capacitance of a Murata 0.1uF 50V X7R cap is down 15% at 25V, and down 50% at 50V.  Since the regulator spec suggests a 22uF minimum, a single 22uF cap might not be enough.  Using two of them instead of just a single 47uF cap might be for all the other reasons mentioned above.

[CatalinaWOW]

I agree, the most interesting question is why it is specified that way.  Some other possible reasons that occur to me:

1.  Packaging.  The two capacitors may fit the available space better or meet part size guidelines in his application.
2.  Part standardization.  This value may be used in a lot of products at the company, allowing bulk buys and reduced cost.
3.  A variant on 2.  The author may have only had 22 microfarad caps in his lab stock.

[David Hess]

I'm also curious why the datasheet doesn't specify a single 44µF capacitor. Is it because 22µF is a standard cap value, but 44µF is not, or is there an electrical reason why two 22's in parallel is better than a single 44?

Two 22 microfarad capacitors in parallel have lower ESR and ESL and higher ripple current rating than a single 44 or 47 microfarad part, and it is the ESR, ESL and ripple current rating which matter in this application.

[Zero999]

I'm also curious why the datasheet doesn't specify a single 44µF capacitor.

The datasheet probably specifies a minimum capacitance so anything above a certain value is recommended.

That's true, but in some cases there may be a maximum capacitance a power supply can handle without becoming unstable or shutting down due to overload. A minimum ESR specification is also common, especially for low drop-out regulators. One must read the data sheet very carefully.

Also, parallel caps generally have a lower ESR than a single cap.

Finally, the selection of 22uF caps might be due to BOM optimization -- i.e. reduce the number of different cap values for the entire board or due to cost or supplier.

True.

In this case ceramic capacitors are recommended. A much larger capacitance and voltage rating might be required to ensure the capacitance is high enough and the output voltage and the ESR is low enough. It might be more practical to use a larger aluminium electrolytic and tantalum capacitor in parallel with a smaller ceramic capacitor.
https://www.diodes.com/assets/Datasheets/AP63200-AP63201-AP63203-AP63205.pdf

Note the layout is very important. Throwing it together any old how will result in failure or poor performance. Follow the recommended layout in figure 25, as closely as possible.

[cmumford]

...

Note the layout is very important. Throwing it together any old how will result in failure or poor performance. Follow the recommended layout in figure 25, as closely as possible.

Thanks Zero999. I completely missed that section of the datasheet. I'll follow that layout.

[TimFox]

From the datasheet you linked:

"The output capacitor keeps the output voltage ripple small, ensures feedback loop stability, and reduces the overshoot/undershoot of the output
voltage during load transients. During the first few milliseconds of a load transient, the output capacitor supplies the current to the load. The
converter recognizes the load transient and sets the duty cycle to maximum but the current slope is limited by the inductor value.
The output capacitor, COUT, requirements can be calculated from equations Eq. 9 and Eq. 10.
The ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from Eq. 9:
𝑽𝑶𝑼𝑻𝑹𝒊𝒑𝒑𝒍𝒆 = ∆𝑰𝑳 ∙ 𝑬𝑺𝑹    Eq. 9
An output capacitor with large capacitance and low ESR is the best option. For most applications, a 22μF to 68μF ceramic capacitor is sufficient.
To meet the load transient requirement, COUT should be greater than the following calculated from Eq. 10:"

Equation 10 didn't copy and paste properly:  see the end of the data sheet.

[Siwastaja]

In a buck converter, much more critical is the input capacitance.

Why? Draw the buck converter schematic (the two switches, input cap, inductor output cap) and add the series inductance of the capacitors (ESL) explicitly, i.e., the small unwanted inductors in series with the capacitors.

Now look at it and ask what happens:
1) when the input current suddenly tries to change from 0 to I_L and vice versa, through the ESL of the input cap.
2) with the ESL of the output cap just acting in series with the explicit inductance which is massive anyway.

And note, ESL is not just a feature of the component itself, more inductance is added by the layout.

Simply put, it's just that buck converter needs input current to change QUICKLY, so the energy reserve needs to be close, otherwise stray inductance generates larger and larger voltage peaks trying to supply those current changes.

So instead of a single 10uF massive input cap somewhere, you might want to parallel say 2-3 4.7uF parts, in smaller package (say 0805), which you can place closer to the switches, and use shortest possible traces or enough vias so that there are multiple parallel paths for the current, as short as possible.

For the output capacitor, the ESL matters for the load and sensing, but not for the switching itself. The output current waveform is just triangle, a lot less nasty than the square-ish wave seen by the input.