What is Single-Point Ground Connection?

[deralbert]

I am building an AC-DC SMPS. As a switcher I have taken TNY286DG. In the documentation for the TNY286DG switcher from Power Integrations I read on page 10: Use a single point ground connection from the input filter capacitor to the area of copper connected to the SOURCE pins [of the switcher].

I have a 4-layer PCB. On layers 1 (top) and 4 (bottom) are components and tracks, layers 2 and 3 have ground planes (see attached pictures). On layer 1 (top) there is a polygon pour, which is connected to the SOURCE pins of TNY286DG, to the minus pin of the bulk capacitor C2 and to a pin of the common mode choke L1. This polygon pour is split in two. But not completely, so this is not yet two separate polygons. I have also added 3D images so that you can better visualize the PCB.

Question: Is this a single-point ground connection? My understanding is that it is not a single-point ground connection. What would I do: I would add a space between the pin of the common mode choke so that it has no connection with the polygon. I would delete the cut-out from the polygon.
But according to the answer of someone on the Power Integrations forum, it is still single-point ground connection. Maybe because the area that was not split is relatively small?

Thank you for your answers in advance.

[Benta]

Aka "star ground".
The idea is that all ground connections are routed directly to the same point. This assures that high current parts do not disturb other voltages due to resistive drop in the tracks; all have the same zero/ground reference.
The slot in your layout is totally off.

[EPAIII]

I think you are confusing the use of the word "point". In "single point ground" the word point does not actually mean a mathematical/geometric point. It means that all the ground connections radiate from a place or circuit element or area where the ground is most firmly established. So, looking just at a PCB which has a ground plane on an internal or bottom layer, simply bringing the ground connections to the parts with vias which are close to are at the component mounting pads, would be a good example of a single point ground.

Of course provision should also be made for the connection of that ground plane to an external (to the PCB) source of ground (chassis, power line ground, separate external ground terminal, etc.) and to any "daughter" boards further down the line in the overall device. One would avoid creating any ground loops inside the overall device, particularly by grounding those "daughter" boards only with a connection to the ground plane or heavy ground paths on the "mother" board.

Another example would be the manner in which I have built facilities. Ideally an earth ground was established with one or several ground rods driven deep into the actual ground beneath the building. I liked driving these ground rods into the water table. If more than one ground rod was used, then they were placed close to each other and connected with a heavy copper strap (6 to 10 inches wide) soldered to them. That established a very solid ground "point" for the facility even though that "point" was sometimes two or three feet wide. Ideally that "point" was at or near the center of the area where equipment was to be located.

From that "point" heavy copper conductors (wire or straps) were run in a radial manner to the various pieces of equipment or enclosures (racks) where equipment was to be mounted. These radials could have branches, but NO LOOPS. And all the ground conductors were kept as close to the actual earth ground (under the floor) as possible. Elevated conductors ARE antennae. Only at the actual equipment locations did the ground conductors branch off in an upward direction to meet the equipment where they were terminated at ground clamps on the chassis of that equipment.

The biggest concept here is NO Ground Loops!. Loops can and DO act as antennae.

[tooki]

Please post the current version of the schematic, so we can be sure you've correctly fixed the errors in the old one.

This board would likely not perform very well, because you're creating at least one ground loop in the most critical area: the feedback loop. The datasheet says "Place the optocoupler physically close to the TinySwitch-4 to minimizing [sic] the primary-side trace lengths." But its emitter goes to a via down to the ground plane, which in turn doesn't connect to the ground on the top layer anywhere except at C2 (and L1), resulting in a shared path for the current to the source pins of the IC: the current from C2 and the current from the emitter of the optocoupler are sharing the same exact path, which is precisely what the datasheet is telling you to avoid!


FYI, this board doesn't need to be 4-layer (in fact, their example layout is for 1 layer, since power supplies are usually made on single-layer PCBs to save cost), and while 2-layer and 4-layer can simplify many designs, if you don't know what you're doing, then they can also be a source of problems. Ground pours make a lot of things easier, but one risk is that you can end up with pins that are connected, but only through a very indirect, meandering path. (This would be obvious when drawing traces without a ground pour.)

At minimum, if you're going to use a 4-layer board with pours, then you must ensure that everything that connects to a pour actually has a direct connection to the pour. THT components get this automatically, but for SMD, you must place vias (generously, for high-current nodes) immediately next to the pads.

[deralbert]

I have updated the first message and added the current schematic.

About the via next to the optocoupler: I didn't think of the downside you explained. Thanks. Is this routing better (see attached picture)? Now both the TNY286DG and the optocoupler have a single point ground connection. But on different sides of the board (top and bottom).

FYI, this board doesn't need to be 4-layer

Yes, I know. My intention was to make this PCB with four layers and clarify the questions I will have during the design. Otherwise I would not have stumbled across the questions and details that have now been addressed.
In fact, now I can see for myself that four layers aren't of much use for this SMPS. At least based on how I use the ground planes. The only benefit I still see from ground planes in my case is the reduction in electromagnetic interference. But it is questionable whether this advantage will achieve much in my case.

Now that we are talking about via, is the via next to IC3 and R7 problematic (secondary side of the circuit)? I would say I have a similar problem with the vias on the secondary side as on the primary side.

[Simon]

stop being lazy and draw proper symbols instead of using that snapeda bollocks. I just can't be arsed to try and figure this schematic out.

[deralbert]

What do you mean by "snapeda bollocks"? Should I draw the circuit in another program or by hand? I can do that, just tell me what you prefer. "Being lazy" wasn't my intention.

[Dave]

He's annoyed that instead of drawing 4 diodes for the bridge rectifier, you simply used a rectangle. The same goes for the transformer, optocoupler, shunt voltage regulator, and common mode choke.

[deralbert]

Oh  I see. Pardonne-moi, I didn't know that it would cause problems for anyone. I haven't seen any guidelines on this in the forum either (maybe overlooked). I will change that and upload a new version of the circuit in the coming days.

[Simon]

my junior colleague insists on not drawing his own symbols and downloads things from snapeda that look like yours. Just boxes with pins. In the same way I can be bothered to articulate my thoughts in words, when creating a schematic I use proper symbols so that it is clear what things are. We use standard(ish) symbols so that we all understand at a glance what things are. It's like the difference between reading nice printed text versus some awfully scrawled handwriting. If you want to communicate with people use the understood symbols in the same way you would use the correct terms in speech or text.

[deralbert]

In my case I just didn't think about it. Partly because I see circuits with blocks like this myself from time to time (and I thought it would be ok to use these blocks as long as everyone understands what they mean and nobody complains about it), partly because no one has ever complained about it untill now. You are absolutely right. I should definitely use the standardized symbols.

Until now I have used SamacSys Library.

[tooki]

stop being lazy and draw proper symbols instead of using that snapeda bollocks. I just can't be arsed to try and figure this schematic out.

Calm your tits, Simon. They’re not great schematics, admittedly, but don’t blame the tool. As he’s stated elsewhere, he’s using Altium. And in my experience, SnapEDA’s symbols aren’t bad. (And they can always be customized if needed.)

[tooki]

In my case I just didn't think about it. Partly because I see circuits with blocks like this myself from time to time, partly because no one has ever complained about it untill now. You are absolutely right. I should definitely use the standardized symbols.

The thing is, between Altium’s Manufacturer Part Search and the big third party libraries (SnapEDA and Ultra Librarian) you will almost always find a good symbol.

FYI, in my experience, SnapEDA responds well (and correctly) to feedback.

[Benta]

Well, at least it's a schematic and not a collection of dotted-line rectangles with one or two parts inside each and text labels all over the place.

[Simon]

stop being lazy and draw proper symbols instead of using that snapeda bollocks. I just can't be arsed to try and figure this schematic out.

Calm your tits, Simon. They’re not great schematics, admittedly, but don’t blame the tool. As he’s stated elsewhere, he’s using Altium. And in my experience, SnapEDA’s symbols aren’t bad. (And they can always be customized if needed.)

my experience of snapeda (looking at a distance) is that all symbols are just a box with all the pins on one side. Maybe my junior is just picking the worse ones. I create all of my own, I trust no one outside of the built in libraries. Footprints you will already have, if you have the footprint then you have the 3D model, so you only need to make the symbol, and for a new part that helps me understand and appreciate the part as I do it. The footprint and the symbol are two different things, I treat them separately, I create a new footprint so that I will know where to find it later if I need it again even if I am creating it far a first new part. Planning cuts down future work, but if you just rush in to get this one done you will always be making a mess.

There are many circuit topologies that we all recognize because they are drawn with instantly recognizable symbols and are laid out in a conventional way. It makes it easier to read a diagram if the conventions are followed rather than things be all over the place, then we can worry about the stuff that does not look right without making more effort. Some people use a diagram just to get the information into the program for making the PCB. This is not nice.

[EPAIII]

I wrote a rather long post on schematics. Then realized it should have been a separate thread. So I am starting one titled: Proper Schematics. All are invited to jump in.