Author Topic: What is the point of 74 series logic OR gate chip  (Read 1878 times)

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Offline vistyTopic starter

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What is the point of 74 series logic OR gate chip
« on: June 08, 2019, 04:13:34 am »
if you can just use some diodes and a pull down resistor what is  the point of having a large 7400 series chip for OR gates?
I'm a newb college student EE major don't roast me too hard.
 

Offline Nerull

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Re: What is the point of 74 series logic OR gate chip
« Reply #1 on: June 08, 2019, 04:18:56 am »
So you don't have to use some diodes and a pull down resistor.

How many of your diode gates can you chain together before the voltage drops too low to be useful? How many other gates can you drive high or low?
« Last Edit: June 08, 2019, 04:22:10 am by Nerull »
 

Offline vistyTopic starter

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Re: What is the point of 74 series logic OR gate chip
« Reply #2 on: June 08, 2019, 04:24:58 am »
ok this makes sense. I was just curious.
 

Offline Tomorokoshi

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Re: What is the point of 74 series logic OR gate chip
« Reply #3 on: June 08, 2019, 04:44:25 am »
How much you get roasted depends on your Rth(j-c).

Resistor and diode logic was used a long time ago. Then they made TTL, Transistor-Transistor Logic.

Just a few advantages on 74 series logic over resistors and diodes:

1. 55+ years of use.
2. Cost for number of units in a package.
3. Size of number of units in a package.
4. Reduction of external pins to install due to internal integration.
5. Higher switching speed.
6. Higher fan-out.
7. Lower fan-in.
8. Lower power.
9. Compatibility with a wide range of parts in the family.
10. Compatibility with many parts in other logic families.
11. Compatibility with processors, etc.
12. Standard design with controlled process.
13. Noise immunity.

Ironically, the threshold to replace logic circuits with very small processors is very low these days.
 

Offline rstofer

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Re: What is the point of 74 series logic OR gate chip
« Reply #4 on: June 08, 2019, 04:46:57 am »
The totem pole output, where the output transistors pull both up and down, help with rise time in the face of load capacitance.  To accomplish the same thing with a pull up resistor would require a fairly low value and waste a lot of heat when pulled down.

You can expand on this by reviewing how RTL (Resistor-Transistor-Logic) and DTL (Diode-Transistor-Logic) work and how those ultimately led to TTL.

I started playing with RTL in 1969...  It wasn't new even then.

 

Offline Ian.M

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Re: What is the point of 74 series logic OR gate chip
« Reply #5 on: June 08, 2019, 04:53:13 am »
Lets *NOT* consider original (and long obsolete) 7400 series TTL logic, as the output isn't rail to rail and the input characteristic is asymmetric, which makes the though experiment harder.  Instead, lets consider 74HC00 series logic - CMOS logic with the same pinout as 7400 TTL, and negligible input current requirements so at low frequencies fanout is only limited by the total capacitance loading the signal, and one's max. risetime requirement.

Consider your diode OR gate, driven by a 5V 74HC CMOS output.  Take the diodes' Vf drop as 0.7V, and you'll see that after one stage of diode OR gates you'll have a logic '1' level of 4.3V.  That's still OK for driving 74HC logic  as its thresholds for logic '1' and '0' are 70% and 30% of Vcc respectively to guarantee the input is recognised as the correct level, so the input needs to be above 3.5V.   Add another stage of diode OR gates and the voltage drops to 3.6V - that's still just OK to drive 74HC logic, but there's not much noise margin - it would only take a small disturbance  for the signal to enter the indeterminate region.  Its therefore obvious that if you are using diode logic, the signal needs to be amplified every stage or two to regenerate the required rail-to-rail output levels.

The situation is worse if you mix diode AND and OR gates. Consider a diode OR driving a diode AND.  For a logic '0', the first gate only drives the second passively via its  pulldown, which forms a potential divider with the second gate's  pullup, so if they are equal, you'll get a output voltage of approx 2.8V for logic '0' - clearly invalid and unusable.

The situation is worse for 7400 series and other BJT 74xx00 'TTL' logic series  as the output swing (as a proportion of Vcc) is much less than 74HC and other CMOS logic families, and a significant current is required to pull an input down to a valid logic '0' level.

It should be noted that the input stages of  74LS and some other second/third generation BJT Schottky 'TTL'* logic families typically use diode logic internally if an AND/NAND function is required at the input.

* actually not TTL as they don't use multiple emitter input transistors, but TTL level input and output compatible.
« Last Edit: June 08, 2019, 11:08:44 am by Ian.M »
 

Offline amyk

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Re: What is the point of 74 series logic OR gate chip
« Reply #6 on: June 08, 2019, 05:37:05 am »
It is worth noting that "wired OR" is still very common in some applications that aren't "exclusively logic" and may involve interaction between multiple non-standard voltages, e.g. power sequencing. For the same reasons, you will also find "discrete" RTL (using MOSFETs instead of BJTs) used there too.
 

Offline soldar

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Re: What is the point of 74 series logic OR gate chip
« Reply #7 on: June 08, 2019, 10:47:46 am »
It is worth noting that "wired OR" is still very common in some applications that aren't "exclusively logic"

I will never forget what "wired OR" is because not knowing what it was cost me an exam in my younger days.

And I will never forget that the teacher told me it is not good when the first exercises you do are the ones you face in the exam.

Since then I always believe that "practice makes perfect".
All my posts are made with 100% recycled electrons and bare traces of grey matter.
 

Offline David Hess

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Re: What is the point of 74 series logic OR gate chip
« Reply #8 on: June 08, 2019, 05:23:49 pm »
It comes down to why TTL replaced DTL.  TTL is faster, draws less power, has greater noise immunity, etc.

The wired-or you suggest with a pull-down resistor driven by multiple diodes would have horrible noise immunity compared to a TTL or-gate in TTL circuits.  TTL wired-or uses open collector outputs which preserve the noise immunity because there is no voltage drop from a diode.

It should be noted that the input stages of  74LS and some other second/third generation BJT Schottky 'TTL'* logic families typically use diode logic internally if an AND/NAND function is required at the input.

* actually not TTL as they don't use multiple emitter input transistors, but TTL level input and output compatible.

AS, ALS, and even some LS use PNP emitter follower inputs so they are TTL again.  Some LS like open collector and clock inputs use the classic multiple emitter input structure; I do not know why.  I think some FAST has PNP inputs also.
 


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