I played around with the Ben Eater project but I never did quite finish it. I built up a pretty nice EEPROM programmer on a real PCB - works well.
It's a good project but, other than getting a bit of experience with TTL and logic design, it doesn't really lead anywhere. OTOH, it's kind of fun.
I like hardware design so I have gravitated toward FPGAs where I can build all the CPUs I can dream up. There is a great project on the Internet known as LC3 (and now LC3b with byte wide operations) and this project comes with an assembler and C compiler as well as the start of an operating system. It wouldn't be a stretch to add a Compact Flash disk drive (I like CF a lot more than SD) and write an OS like CP/M. Some kind of non-realtime single user system.
For any of these digital projects, a logic analyzer is pretty useful. OTOH it might not be a useful for FPGAs because there may not be enough pins brought out to accomodate the signals of interest. There is a tendency lately to bring out some minimal number of pins onto mostly useless headers like PMOD. Those boards with Arduino headers may be more useful.
No worries, the modern Xilinx chips (Artix 7 and up) work with the newer Vivado toolchain and it includes an Internal Logic Analyzer (ILA) that give the PC access to internal signals. Lots of them!
I tend to want development boards with lots of switches, 7 segment displays, LEDs, buttons, etc. I use these along with single stepping to do most of my debugging. The Digilent Nexys A7 is my favorite at the moment:
https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/The Arty boards are somewhat useful but they don't have any of the switches, knobs or dials.
Logic analyzers are cheap and a good scope will be pretty useful. The DS1054Z is pretty sweet but the Siglent SDS1104X-E is a strong contender. In my view, 4 channels is required.
Writing HDL for an FPGA seems a lot like writing code and this traps a lot of CS types. Everything in an FPGA happens concurrently - everything! The HDL may read from top to bottom but that's not the way it executes.