Electronics > Beginners

Why am not able to get a grasp of PCB designing?

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tautech:


Looking better.  :)
How do you feel about progress thus far ?

Can you name the USB socket designator that's on both sides ?
How do you feel about rotating the IC another 45o to the left ?

redgear:

--- Quote from: tautech on December 03, 2019, 08:36:36 am ---Looking better.  :)
How do you feel about progress thus far ?

--- End quote ---
Thanks.
This is cool! Awesome. What I once thought I could never do, I am almost there.
Thanks a lot for everyone who helped. :-+

--- Quote ---Can you name the USB socket designator ?
How do you feel about rotating the IC another 45o to the left ?

--- End quote ---
J5 and J6.
Let me try...

tautech:

--- Quote from: redgear on December 03, 2019, 08:50:31 am ---
--- Quote from: tautech on December 03, 2019, 08:36:36 am ---Looking better.  :)
How do you feel about progress thus far ?

--- End quote ---
Thanks.
This is cool! Awesome. What I once thought I could never do, I am almost there.
Thanks a lot for everyone who helped. :-+

--- End quote ---
That's made my day.
Really happy to see you getting your head around it and congrats for sticking at it.  :clap:

If the 45 anticlockwise doesn't look viable it don't matter as you've proved if it is by trying it.

thinkfat:
I think it's getting somewhere now. Good job!

Now, I think you can keep the net ties, if they help you staying close to the the sample schematic and if they don't confuse you, just keep in mind to treat them as a sub-part of the mosfets they're attached to and keep them close together.

On the question of thermal vias - yes, you need them. And you need to keep a considerable area of copper below the IC so that the heat can go somewhere. Also, the power pad seems to be the main ground connection, you'll need to keep that in mind.

There's a few other things to consider:

- the VOUT portion is the main power rail for the USB connectors. You need a quite beefy connection there, placing the capacitors on the opposite side of the PCB needs some care taken. I don't know how many amps you plan to source simultaneously, but keep in mind that you need a significant trace width. If the capacitors are supposed to stay on the bottom side, you'll need plenty of vias to keep the inductance low.

- I didn't see straight and suggested to keep J3 where it is, but if you look at the ratsnets, it'll be even easier if you swap J3 and J4.

- Around the switching part of the boost converter, you'll need to think about keeping ground loops very tight. The copper area of the SW node should be kept small. Place L1 close to the IC pins and on the top side. The thing looks _huge_. Which component did you choose? Maybe you can find a different type that exchanges PCB area with height? But I'm not sure about the overall dimensions. Also, treat this area with care while routing traces on the bottom side, make sure to not cut or obstruct the ground loop of the boost converter part. There'll be high switching currents flowing, you need as low an impedance as you can get. It's a shame the chip vendor doesn't provide a layout suggestion.



redgear:

--- Quote from: thinkfat on December 03, 2019, 09:00:12 am ---I think it's getting somewhere now. Good job!

--- End quote ---
Thanks.

--- Quote ---Now, I think you can keep the net ties, if they help you staying close to the the sample schematic and if they don't confuse you, just keep in mind to treat them as a sub-part of the mosfets they're attached to and keep them close together.

--- End quote ---
The sample schematic does not use net-ties, @jhpadjustable suggested to add them and helped me around the DRC errors in schematics.


--- Quote ---On the question of thermal vias - yes, you need them. And you need to keep a considerable area of copper below the IC so that the heat can go somewhere. Also, the power pad seems to be the main ground connection, you'll need to keep that in mind.

--- End quote ---
Ok

--- Quote ---There's a few other things to consider:

- the VOUT portion is the main power rail for the USB connectors. You need a quite beefy connection there, placing the capacitors on the opposite side of the PCB needs some care taken. I don't know how many amps you plan to source simultaneously, but keep in mind that you need a significant trace width. If the capacitors are supposed to stay on the bottom side, you'll need plenty of vias to keep the inductance low.

--- End quote ---
The max current will be 4A. I was considering something around 100-110 mils. I used a online trace width calculator and the result was 104mils. Nope the capacitors can be placed on the top side too. While the chip's datasheet gives no layout recommendations, a similar chip that i selected previously wanted those capacitors on VOUT network to be placed as close as possible to IC. So, I just put them directly underneath. There is still space for the capacitor to be accommodated on the top side of the board. If that is better, I will flip them to the top.

--- Quote ---- I didn't see straight and suggested to keep J3 where it is, but if you look at the ratsnets, it'll be even easier if you swap J3 and J4.

--- End quote ---
Done, exchanged them.

--- Quote ---- Around the switching part of the boost converter, you'll need to think about keeping ground loops very tight. The copper area of the SW node should be kept small. Place L1 close to the IC pins and on the top side. The thing looks _huge_. Which component did you choose? Maybe you can find a different type that exchanges PCB area with height? But I'm not sure about the overall dimensions. Also, treat this area with care while routing traces on the bottom side, make sure to not cut or obstruct the ground loop of the boost converter part. There'll be high switching currents flowing, you need as low an impedance as you can get. It's a shame the chip vendor doesn't provide a layout suggestion.

--- End quote ---
Ok. Does it make sense to flip the mosfets to the back and get the inductor on top near the IC? I went with the one that was recommended in the BOM. Here is the datasheet SPM10102R2MESN. I was not able to find a footprint online so I created one myself, I might have made a mistake if that component looks unsually huge.

Thanks :)

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