Electronics > Beginners

Why am not able to get a grasp of PCB designing?

<< < (24/29) > >>

Rerouter:
well they say that SW and VOUT should not change layer, which kinda nudges towards also having the BAT caps on the top side to, playing with it now, but very possible, main thing is I should shift it back towards the center, but I am thinking you can route a lot of the VOUT/VBUS traces under the plugs, and place the mosfets for each plug practically next to the USB ports.

I have done the caps for the inductor a little weird, but this was to keep the smallest loop area I could find for this inductor, I would be feeding in the battery connection to both capacitor groups seperatly,

edit: by loop area, you can treat it like drawing a line that shows where the current goes along the power trace, vs how it has to travel on the ground plane to complete that loop, anywhere it deviates from being directly next to or under that power trace is a possible EMI noise source for switchmodes, or a potential antenna for general signal traces (e.g. your KEY pin)

thinkfat:

--- Quote from: Rerouter on December 04, 2019, 07:34:17 am ---It can be done on 2, you just need to avoid crossings under switching nodes or the differential pairs, It makes it harder, but it is still possible. as for the trace widths, it is a recommendation, but you can neck-down the traces where they enter the IC if you wish

there reference layout looks very weird, they have there switching node taking up half of the PCB.

Working on the top layer, its quite possible to lay it all out, just a pain in terms of loop side, seeing as 8-27 need to be escaped

--- End quote ---

Yeah, having a large switching node is not a good idea, specifically for EMI. That thing radiates like crazy. The larger it gets, the more possible modes it has for forming resonances while you pump pulses of energy into it that are rich of harmonics.

thinkfat:

--- Quote from: redgear on December 04, 2019, 07:08:05 am ---
--- Quote from: tautech on December 04, 2019, 06:52:01 am ---If you can copy paste, drop it in here:
https://translate.google.com/

Build a new English doc in MS Word or similar.

--- End quote ---

Here is the translated version.

They have recommended to use a 4 layer board. Will it be possible to do it in a 2 layer board? I feel like it can't be done in a 2 layer board if I were to use the recommended trace width. Also, they recommend to use 8 mils or 10 mils as default trace width but if I use that, the traces won't connect to the ic pins.

--- End quote ---

Reading the layout recommendations made me smile a bit, they basically reiterate what I've already mentioned ;)

Will it be possible to use only two layers - well, you'll likely get all the traces connected, but as I see it, the question is more if you'll be able to get the thermal design right. Even though they claim 95% of efficiency, let's be conservative and only assume, like, 85% or so, which means at full tilt doing 22 watts, you'll need to get rid of about 3 watts of heat through a tiny 6x6mm chip. The center pad is even less than that, hence their recommendation to put 36 vias into the center pad. But that buys you nothing, if those vias are not connected to a huge amount of copper. With a 4 layer board, you can dedicate a full layer to being a ground plane and they still say you need to keep a considerable window under the chip as an unbroken copper area.

The next aspect a 4 layer board helps with is that you have high-impedance sense wires for voltage and current sensing running around, those will very easily pick up dirt from the switching node. Putting them on the bottom layer and using ground the ground planes as a shield will definitely help here.

redgear:

--- Quote from: Rerouter on December 04, 2019, 08:59:49 am ---well they say that SW and VOUT should not change layer, which kinda nudges towards also having the BAT caps on the top side to, playing with it now, but very possible, main thing is I should shift it back towards the center, but I am thinking you can route a lot of the VOUT/VBUS traces under the plugs, and place the mosfets for each plug practically next to the USB ports.

I have done the caps for the inductor a little weird, but this was to keep the smallest loop area I could find for this inductor, I would be feeding in the battery connection to both capacitor groups seperatly,

edit: by loop area, you can treat it like drawing a line that shows where the current goes along the power trace, vs how it has to travel on the ground plane to complete that loop, anywhere it deviates from being directly next to or under that power trace is a possible EMI noise source for switchmodes, or a potential antenna for general signal traces (e.g. your KEY pin)

--- End quote ---

This looks great! Do you have the SW1 on the right side? I'm not able to find room for the IC if I have it there.

Rerouter:
Can do, just had to shift around the IC a little, whats mainly left is the mosfets and sense lines, but with some fiddling there silly guide can be followed for a 2 layer fitout

Navigation

[0] Message Index

[#] Next page

[*] Previous page

There was an error while thanking
Thanking...
Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod