Electronics > Beginners
Why am not able to get a grasp of PCB designing?
thinkfat:
--- Quote from: jhpadjustable on December 02, 2019, 12:07:52 pm ---
--- Quote from: thinkfat on December 02, 2019, 10:59:55 am ---OK, so they're not serving a real purpose. Drop them, it will at least make the ratsnest connections more clear.
--- End quote ---
That was me. I suggested redgear add them so that the current/voltage sensing at the MOSFETs would be distinctly routable. Is that overkill?
--- End quote ---
Ah, OK! So you wanted them as attachment points for sense wires? I actually never thought of that.
I'd probably not do it like that. IMHO it creates more constraints on routing and placement for the sake of having different net names.
tautech:
Provide a list of locked components.
Move any designators so it's clear which component they belong to.
Place some designators within the footprints of large components for the meanwhile.
C17,18 appears to have the same net for both pads. :-//
If convenient on dumb components swap the nets to the other pad. (switches etc)
Rotate IC 180o taking small passives with the rotate. (R2,3,4,7,8,9, C4,5)
That's enough for now.
jhpadjustable:
--- Quote from: thinkfat on December 02, 2019, 04:03:38 pm ---Ah, OK! So you wanted them as attachment points for sense wires? I actually never thought of that.
--- End quote ---
I'd gotten the impression from the datasheet (p3, attached in OP's other thread) that's what the VOUTA etc. pins were for. I'm not 100% sure what the chip maker was thinking, though. Maybe the net ties i recommended were intended to be actual resistors but not drawn as such on the typical application circuit (p23)? :-//
thinkfat:
--- Quote from: jhpadjustable on December 02, 2019, 05:06:01 pm ---
--- Quote from: thinkfat on December 02, 2019, 04:03:38 pm ---Ah, OK! So you wanted them as attachment points for sense wires? I actually never thought of that.
--- End quote ---
I'd gotten the impression from the datasheet (p3, attached in OP's other thread) that's what the VOUTA etc. pins were for. I'm not 100% sure what the chip maker was thinking, though. Maybe the net ties i recommended were intended to be actual resistors but not drawn as such on the typical application circuit (p23)? :-//
--- End quote ---
The VOUTA VBUSA etc. pins are indeed sensing pins, to switch off the port when no load is connected. They're using the Rds_on of the gating mosfet as a current sense resistor. That's creative ;-)
VOUTA pins are the same net as VOUTP. However, they should be connected close to the mostfets, and the mosfets should be placed close to their respective receptacles, just like you would do with a current sense resistor. You want to exclude the burden voltage of the traces from the measurement, though it won't matter a lot here, the Rds_on of the mosfets is whatever it is anyway. But we're still talking milli-ohms and a piece of trace will matter.
But, as a first project, this is going to be a struggle. It's not just about placing the components and connecting them, there's a boost converter, differential signals, analog sensing, that's a lot of constraints to take into account. Don't forget the thermal design, this converter needs to dump the waste heat somewhere...
redgear:
--- Quote from: thinkfat on December 02, 2019, 10:59:55 am ---Seems you forgot.
--- End quote ---
Please find it with this reply. Sorry.
--- Quote ---Press 'H' and see if the result helps you.
--- End quote ---
No change.
--- Quote ---Are you hellbound on the placement of those connectors? The routing would become much easier if J4 and J5/J6 swapped places.
--- End quote ---
Nope. Except DS1 and SW1 I am free to move anything anywhere.
--- Quote from: thinkfat on December 02, 2019, 09:10:25 pm ---The VOUTA VBUSA etc. pins are indeed sensing pins, to switch off the port when no load is connected. They're using the Rds_on of the gating mosfet as a current sense resistor. That's creative ;-)
VOUTA pins are the same net as VOUTP. However, they should be connected close to the mostfets, and the mosfets should be placed close to their respective receptacles, just like you would do with a current sense resistor. You want to exclude the burden voltage of the traces from the measurement, though it won't matter a lot here, the Rds_on of the mosfets is whatever it is anyway. But we're still talking milli-ohms and a piece of trace will matter.
But, as a first project, this is going to be a struggle. It's not just about placing the components and connecting them, there's a boost converter, differential signals, analog sensing, that's a lot of constraints to take into account. Don't forget the thermal design, this converter needs to dump the waste heat somewhere...
--- End quote ---
Should I ditch the Net-ties? I initially had thermal vias on the IC but removed it as became difficult to place components. Should I uses thermal vias?
--- Quote from: tautech on December 02, 2019, 04:44:37 pm ---Provide a list of locked components.
--- End quote ---
Except for DS1 and SW1 in the new image(swapped J5 and J6 to the other side following @thinkfat's suggestion) below, I am free to move anything anywhere.
--- Quote ---Move any designators so it's clear which component they belong to.
Place some designators within the footprints of large components for the meanwhile.
--- End quote ---
Hope they are better now.
--- Quote ---C17,18 appears to have the same net for both pads. :-//
--- End quote ---
No, there are two USBs on both sides of the board. They placed exactly opposite. So, in the image it looks like they have same nets on both pads.
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