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Why are some MOSFET body diodes drawn as zeners and others as diodes?
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exe:
I wouldn't rely on schematic to be accurate in such "tiny" details. Intrinsic diode often now drawn at all (and I don't like this). I'd say a proper part number and a short note on the schematic is a better way to indicate requirement for avalanche-rate fets.
rfeecs:
"an intrinsic diode forms between the channel and the substrate"  No, there is no diode there.

The arrow just shows the polarity of the body material (p or n).

There are two intrinsic diodes.  One between source and body, one between drain and body.  There is not a diode between the channel and body.

The two back to back diodes can form a parasitic bipolar transistor.  So the body is usually connected to the source to short out one of the diodes.  This leaves a diode connected from drain to source, the body diode.

The schematic symbol is an abstract simplified representation of the transistor.  I wouldn't worry about the details of whether the body diode is drawn as a Zener or not.
Sceadwian:
Yeah, I'm not sure I would trust it to intrinsically mean anything, though it may suggest that the FET should be rated for repetitive avalanche that depends on the specs of the FET not the symbol used for it. I wouldn't trust anything but the specs.
David Hess:

--- Quote from: rfeecs on September 12, 2018, 05:30:51 pm ---"an intrinsic diode forms between the channel and the substrate"  No, there is no diode there.

The arrow just shows the polarity of the body material (p or n).

There are two intrinsic diodes.  One between source and body, one between drain and body.  There is not a diode between the channel and body.

The two back to back diodes can form a parasitic bipolar transistor.  So the body is usually connected to the source to short out one of the diodes.  This leaves a diode connected from drain to source, the body diode.
--- End quote ---

I have always assumed the customary diode shows the shorted base-emitter junction of the parasitic transistor.  There are *two* parasitic diodes forming a parasitic bipolar transistor but only one diode is shown on the MOSFET with a separate substrate connection.

On my schematics, I explicitly show the source-drain diode if only to remind me of which direction it faces.  The difference with avalanche rated diodes which in this case is the collector-base junction of the parasitic transistor is that they are specially processed to produce a uniform junction preventing hot spots and current crowding.
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