Electronics > Beginners

Why binary is represented by two bits 0 and 1 and not three bits?

<< < (13/16) > >>

TomS_:

--- Quote from: paulca on October 29, 2019, 09:25:04 am ---In uni we were given an assignment to build a logic circuit to run a 7 segment display from a 4 bit binary bus input.  We were only allowed to use NAND gates.  Was quite challenging and quite interesting to do.  Think it ended up being about 50 gates.

--- End quote ---

I built a clock and calendar using nothing but NOR logic. It really makes you appreciate having the other logic functions and prepackaged circuits for various purposes.

My 7 segment decoders were much simpler than 50 gates though. I used k-maps to figure out the logic required for them which helped a lot.

TheUnnamedNewbie:

--- Quote from: tooki on October 29, 2019, 04:53:06 pm ---Indeed, a substantial percentage of the digital signaling we use does not rely on encoding a 1 as a high voltage and 0 as a low one. Manchester encoding/NRZ for example is very common.

--- End quote ---

I think Manchester/NRZ was not what we were pointing to, it still uses only two levels. Rather things like PAM4/6/8, BPOOK, multi-level ASK/FSK etc...

Nominal Animal:

--- Quote from: TheUnnamedNewbie on October 29, 2019, 12:23:16 pm ---There has actually been some revival in multi-level logic recently. [...] Sure, the gates become more complicated, but I don't think that is such a big issue

--- End quote ---
Multi-level logic is simple to implement for storage and communications, but the complexity in computational logic (number of possible operators) blows through the roof.  The possible configuration space for even just a handful of interconnected gates gets too large to brute-force through, and there has not been much research in the last few decades into multivalue logic (as a subfield of mathematics).

For N-level logic, there are NN unary and NN2 binary operators.  For 4-level logic, that is 256 unary operators, and 4,294,967,296 binary operators.  Depending on the gate types, there are usually more possible gate configurations than the operators, although a tiny subset of the operators is needed for Boolean/binary algebra.  The issue is optimization: even with a handful of operators, the space of possible configurations is too wide to effectively search.

So, I would claim that it is precisely the complexity that is the issue.

Someone would have to see what the electrical components for multi-level logic gates are, then do inefficient multi-level logic gates, then combine a few to implement the standard operators for binary algebra, then implement some kind of search across the huge possible operator space to look for efficient configurations (perhaps do it in reverse, looking at what kind of operators one can implement the easiest, using the basic components available)... A very interesting research project, and probably will be done at some point, but will take a while to get into real-world products, methinks.

tggzzz:

--- Quote from: Nominal Animal on October 30, 2019, 01:01:49 pm ---So, I would claim that it is precisely the complexity that is the issue.

--- End quote ---

However the internal complexity of logic gates/functions is much less of an issue that it used to be. Interconnections (cross-chip and external), noise/crosstalk, and power consumption are more problematic.

Plus if processes continue to shrink, soon the number of electrons/holes in a transistor will be come a problem :)

wraper:
Introducing multiple levels in logic would mean hugely increased power consumption. To keep it reasonable with CMOS, you would need to do something like multiple power voltages. CMOS consumes barely any current when staying in stable state, current flow happens only during changing state. To keep it in intermediate state, current would need to flow all of the time.

Navigation

[0] Message Index

[#] Next page

[*] Previous page

There was an error while thanking
Thanking...
Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod