Author Topic: EEVblog #1221 - Mailbag Monday  (Read 990 times)

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Offline EEVblog

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EEVblog #1221 - Mailbag Monday
« on: June 17, 2019, 11:28:15 pm »
Mailbag Monday



SPOILERS:
Fran Blanche's Apollo DSKY T-Shirt

Ollie: Voice control for oscilloscopes
https://github.com/jmwilson/ollie
Using Snips: https://makers.snips.ai/
BreadShield Crowd Supply Project: https://www.crowdsupply.com/loser/breadshield
Soviet era MKU-1 Calculator New-In-Box!
Aprilog SMD test adapter http://www.aprilog.com/
Relay Timer design
Vintage HP PCB's

 

Offline joeqsmith

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Re: EEVblog #1221 - Mailbag Monday
« Reply #1 on: June 18, 2019, 12:01:53 am »
Speech recognition is excellent work!   
How electrically robust is your meter?? https://www.youtube.com/channel/UCsK99WXk9VhcghnAauTBsbg
 

Offline MT

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Re: EEVblog #1221 - Mailbag Monday
« Reply #2 on: June 18, 2019, 12:12:39 am »
Do one have to say entire sentences?
 

Offline Treehouseman

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Re: EEVblog #1221 - Mailbag Monday
« Reply #3 on: June 18, 2019, 12:49:47 am »
There doesn't seem to be anything wrong with that VFD. The "black" is the getter, it keeps the tube air free, when they're bad they turn white. They generally are activated after the tube is sealed, via induction heaters that vaporize the material into coating the glass. It seems here that the backside of the display assembly got coated as well. That calculator could very well be worth a second look, could just be some bad caps or transistor. =
 

Offline bdunham7

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Offline German_EE

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Re: EEVblog #1221 - Mailbag Monday
« Reply #5 on: June 18, 2019, 09:12:18 am »
Worth watching just for that trick with the delay lines. I might try making some of those just to see what happens.
Should you find yourself in a chronically leaking boat, energy devoted to changing vessels is likely to be more productive than energy devoted to patching leaks.

Warren Buffett
 

Offline David Hess

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Re: EEVblog #1221 - Mailbag Monday
« Reply #6 on: June 19, 2019, 04:02:20 am »
All of that Motorola logic is 10 series ECL (emitter coupled logic) so fast even by today's standards.

Delays are sometimes used in ECL to meet setup and hold time requirements but they would be fixed.  I wonder if in this case the adjustable delays are to calibrate a phase or delay locked loop which is needed to recover the serial bit stream.
 

Online floobydust

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Re: EEVblog #1221 - Mailbag Monday
« Reply #7 on: June 19, 2019, 07:04:54 am »
The IV-18 VFD is fine, it's looks identical to one I have. The white splotch is something factory painted on the inside glass. It is centered around the getter and the two halos so it might be barium oxide. The tube works fine.
I would fix the power supply and see if the calculator is RPN or what. See how long 69 factorial takes.

Rockwell used the staggered pin package for their MCU's in the 80's. It was mostly military use. Those lovely Russian spies must have obtained the blueprints  ;)
 

Offline Cthulhoid

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Re: EEVblog #1221 - Mailbag Monday
« Reply #8 on: June 20, 2019, 12:09:03 am »
Could you upload those ROM dumps somewhere?
 

Offline bsfeechannel

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Re: EEVblog #1221 - Mailbag Monday
« Reply #9 on: June 21, 2019, 12:27:08 am »
Since the date codes on most of the ICs indicate 1989 or 1990, I searched the HP catalogs around those years on the HP archive, but could not find any single reference to the HP boards.

I was able to find only a reference for the 37288A on a Keysight page that says the product is obsolete and there are no documents about it available.

140Mb/s is the fourth level of the E-carrier system in a PDH (Plesiochronous Digital Hierarchy) network. It was used primarily in Europe and some other parts of the world. Perhaps those boards belong to a specific catalog for those markets. It is a multiplexing system for digital telephone lines, replaced by SDH (Synchronous Digital Hierarchy) and Ethernet with IP switching.

The use of 75-ohm cable is because it offers less attenuation. A 50-ohm cable is more suited for high power transmission.

The signal coming into the 37288A, probably coded in CMI or HDB3, must be treated by an amplifier with AGC, then handled over to clock detection and pulse regeneration. This may explain the presence of that hybrid IC (perhaps a PLL) and the presence of the delay lines to adjust the exact timing when 0s and 1s should be decided.

These networks had strict timing and level requirements, didn't allow retransmission of a wrong sequence, and demanded a very low bit error rate (BER) in the range of 1 error per 10⁹ bits transmitted max.

Those were the days.
 


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