Author Topic: EEVblog #1018 - ZeroPlus Logic Analysers  (Read 5300 times)

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Offline EEVblog

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EEVblog #1018 - ZeroPlus Logic Analysers
« on: August 25, 2017, 01:08:20 am »
Dave looks at several USB logic analysers from ZeroPlus
http://amzn.to/2ga5ev2
http://www.zeroplus.com.tw

 

Offline dr.diesel

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #1 on: August 25, 2017, 01:11:47 am »
Can't say I'm too keen on 5.55A via a barrel jack. 

Offline Tek_TDS220

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #2 on: August 25, 2017, 02:08:31 am »
Yes, a barrel connector on a $3k analyzer is surprising.  I wonder how tolerant it is of a power supply with a center-ground?
 

Offline MattSR

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #3 on: August 25, 2017, 11:02:22 am »
The Kintex
-7 was a pleasant surprise!
 

Offline lukier

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #4 on: August 25, 2017, 11:05:56 am »
I have mixed feelings about this ZeroPlus F model.

On one hand the main box is nicely designed, Cypress EZ-USB 3.0, Kintex FPGA, brand name DAC and DC-DC modules. The amount of jumpers and DIP switches is insane though.

On the other hand, high end logic analyzers are all about probing and that's where often the money is. While the USB 3.0 connectors seem like a clever idea (well cheap definitely) the podlets don't look serious and move the whole setup from mid-range (~1 GHz) to low-end (<200 MHz) I would say:
1) heatshrink with some stuff sticking out? seriously,
2) single ended only,
3) input capacitance of 4.3pF and max bandwidth of 120 MHz, not surprising as it uses a 0.1" lead and dupont connector, so 1 GHz timing clock is more than enough, I don't know what's the rule of thumb for logic analyzers (times 2.5?),
4) while sometimes I it would be an advantage to have each channel in a separate lead and podlet, often one wants to probe multiple channels on a single board hence the famous Mictor connectors or special landing pads for Tektronix compression-elastomer or D-Max probes. I don't know how to do this in this setup.

Old Tektronix probes for comparison: http://w140.com/tek_p6800-series_manual.pdf
P6860: Minimal loading of 0.7 pF @ 20 k? to ground loading

Well that's the hardware, don't know the software so maybe it compensates for these shortcomings and makes it worth $3000.  Not cross-platform though :(
 

Offline Smokey

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #5 on: August 25, 2017, 05:30:00 pm »
After watching the software review part I was thinking about how funny it would be to watch Dave use Altium Designer for the very first time without knowing anything about how to drive it, especially after having experience with some other completely different package and expecting things to work in a certain way.  In my experience with putting new people in front of Altium and watching them try to navigate it, absolutely nothing is intuitive.  There is about a 0.001% chance of getting anything done without days of reading a TON of help guides/videos or having someone sitting there giving you lessons.  Randomly pointing/clicking/dragging at things won't get you anywhere, and will most likely get you locked into some state you don't know how to get out of that makes things worse.  And Altium isn't a $2000 piece of software, it's a $10000 piece of software with a thousand+ dollar yearly maintenance charge.  I have a feeling Dave would absolutely crap on Altium from a "first impressions" standpoint and give it the biggest "fail" he's ever given anything.  Is that fair and a good representation of it's actual value?
 
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Offline TK

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #6 on: August 25, 2017, 06:57:42 pm »
I've been using Zeroplus for many years.  It was my first logic analyzer, so for me, it was OK because I could find everything I needed to do by reading the manual and spending time with the software during the initial learning curve phase (actually more trial and error than reading the manual).  After you get used to the software, having access to over 100 serial decoders, makes it difficult to switch to other logic analyzers.  Later I tried saelig, and for sure the software is easier to use, looks nicer, but functionality is basic compared to zeroplus.  Recently I got several HP and Agilent logic analyzers, and doing timing analysis is way better, but serial decoding is painful, even in the "newer" 16801A.  Agilent added i2c and SPI decoding, but only in listing mode and each decoding is shown in separate columns.

In summary, each device has PROS and CONS.  Zeroplus is nice for serial decoding of 100+ protocols.  Old school Logic Analyzers are good for timing analysis and some vintage CPU disassembly in state mode.

The zeroplus LA was hackable (from the basic 16 channel 32Kb memory model to the full 32 channel 2Mb memory model) by adding the resistors, caps, the input buffer and switching the SRAM, and changing the device ID through USB, but I think the door was closed many years ago.
 

Offline thm_w

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #7 on: August 25, 2017, 08:49:11 pm »
Yes, a barrel connector on a $3k analyzer is surprising.  I wonder how tolerant it is of a power supply with a center-ground?

They didn't populate D1, which has the symbol of a schottky so there is no reverse protection. Its not clear why. Reversing voltage would blow some caps and possibly even the dc/dc converters.
Really D1 should be a unidirectional TVS placed after the SRF. And the SRF is quite overrated at 10A.
Poor design IMO.
 

Online nctnico

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #8 on: August 25, 2017, 09:56:22 pm »
After watching the software review part I was thinking about how funny it would be to watch Dave use Altium Designer for the very first time without knowing anything anywhere, and will most likely get you locked into some state you don't know how to get out of that makes things worse.  And Altium isn't a $2000 piece of software, it's a $10000 piece of software with a thousand+ dollar yearly maintenance charge.  I have a feeling Dave would absolutely crap on Altium from a "first impressions" standpoint and give it the biggest "fail" he's ever given anything.  Is that fair and a good representation of it's actual value?
Altium is about the most non-intuitive piece of software I ever used. If you have used a CAD package before then you should be able to get going with a different CAD package but with Altium that is not the case so yes, that counts as a fail. The same goes for using a logic analyser. What it doesn't isn't rocket science and you shouldn't really need to read the manual to do basic stuff. If you need the manual once, you'll need it everytime and that will make a device hard to use (unless you use it every day).

Edit: I agree with Lukier's remarks about the 'high speed' box. There are other, more suitable connectors out there (the ones used for SCSI for example) which allow to make a multi-channel probe (or pod). Gettting the single probes deskewed will be a nightmare and in high-speed circuits you really don't want 0.1" / 2.54 mm pin headers. Imagine routing a DDR3 bus or LVDS lanes with a pin header in between?
« Last Edit: August 26, 2017, 09:49:59 am by nctnico »
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline alm

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #9 on: August 27, 2017, 12:50:59 pm »
Edit: I agree with Lukier's remarks about the 'high speed' box. There are other, more suitable connectors out there (the ones used for SCSI for example) which allow to make a multi-channel probe (or pod). Gettting the single probes deskewed will be a nightmare and in high-speed circuits you really don't want 0.1" / 2.54 mm pin headers. Imagine routing a DDR3 bus or LVDS lanes with a pin header in between?
The 'probes' (except for the eMMC one) are limited to a bandwidth of 120 MHz and a transmission rate of 120 MBit/s, so you would not be probing a DDR3 bus with these. Never mind that 4.3 pF of input capacitance could easily mess up your signal. But I agree that a logic analyzer with up to 64 channels without some sort of high-density connector is ridiculous. They could at least have offered a Mictor adapter with a dozen or so USB pigtails. We do not live in the early nineties anymore when PCB traces were commonly on 2.54mm spacing for DIP ICs. Good luck connecting 128 individual wires to your board, and then switching them over to another board to check for differences.

I am also not crazy about abusing standard consumer connectors for other purposes. I hope they are designed so connecting them to a standard USB 3 port will not damage either side.
 

Offline Fungus

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #10 on: August 27, 2017, 02:51:58 pm »
I am also not crazy about abusing standard consumer connectors for other purposes. I hope they are designed so connecting them to a standard USB 3 port will not damage either side.

Those were my first thoughts, too.

a) Yes, there are people stupid enough.
b) It costs $4000 so saving $2 on connectors is no excuse.
 

Online Zbig

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #11 on: August 28, 2017, 11:31:14 am »
Dave shoud now send the Saleae guys a big fat invoice as he's basically made an hour-long advertisement for their software *) Pretty much every aspect of the software Dave has complained about is done better/more intuitive/more polished and generally in line with what Dave said he'd expect it to be in Logic. And, BTW, the current line of Saleae products is several years old now and none of them is a simple Cypress one-chip implementation anymore. All of them have at least one analog-capable channel (think low-bandwidth scope). It's high time to stop repeating the "it's just a Cypress demo-board with a proprietary software" misinformation, already.

*) Yes, it was little tongue-in-cheek, in case that wasn't obvious, so no flame-wars, please
« Last Edit: August 28, 2017, 12:14:46 pm by Zbig »
 

Offline rsjsouza

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #12 on: August 28, 2017, 05:59:26 pm »
After watching the software review part I was thinking about how funny it would be to watch Dave use Altium Designer for the very first time without knowing anything about how to drive it, especially after having experience with some other completely different package and expecting things to work in a certain way. (...)
That was my precise thought when I saw the SW portion of this video. Things probably changed nowadays but, in my undergrad days, LA's used to be one of the hardest pieces of gear to use on a lab - using one without reading a great portion of its manual was an exercise in frustration. Back then I was also battling through OrCAD for DOS when I found Protel and got instantaneously hooked - years later I started working with Altium 13 and only the fundamental concepts were still the same but the interface was very confusing to me.

Edit: I agree with Lukier's remarks about the 'high speed' box. There are other, more suitable connectors out there (the ones used for SCSI for example) which allow to make a multi-channel probe (or pod). Gettting the single probes deskewed will be a nightmare and in high-speed circuits you really don't want 0.1" / 2.54 mm pin headers. Imagine routing a DDR3 bus or LVDS lanes with a pin header in between?
The 'probes' (except for the eMMC one) are limited to a bandwidth of 120 MHz and a transmission rate of 120 MBit/s, so you would not be probing a DDR3 bus with these. Never mind that 4.3 pF of input capacitance could easily mess up your signal. But I agree that a logic analyzer with up to 64 channels without some sort of high-density connector is ridiculous. They could at least have offered a Mictor adapter with a dozen or so USB pigtails. We do not live in the early nineties anymore when PCB traces were commonly on 2.54mm spacing for DIP ICs. Good luck connecting 128 individual wires to your board, and then switching them over to another board to check for differences.

I am also not crazy about abusing standard consumer connectors for other purposes. I hope they are designed so connecting them to a standard USB 3 port will not damage either side.
I agree with that as well and was surprised when Dave didn't point that out. It's been quite a long time since I have seen high speed interconnections with 2.54mm headers surrounding a device - Mictors are commonplace.
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Offline jan.met

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #13 on: September 01, 2017, 12:56:58 pm »
I actually have one of the low end analyzers. As Dave guessed, they are hackable. You can expand the 16 channel model to 32 channels by populating the input frontend on the PCB (basically the 16'245 and a few passives). Also you can increase the channel memory in software to 128k per channel or beyond by replacing the memory chip with a larger one. This make them good value for the hobbyist. Information how to do this is easylin found on the internet.

I foun that indeed, if you are used to the Salea software, the Zeroplus software seems ancient and clumsy. But it is quite powerful and I could do what I wanted to do with it. Also the device is supported by Sigrok, so if you are willing to invest some time, you can even roll your own protocol decoders.
 

Offline MattSR

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #14 on: September 02, 2017, 11:30:35 am »
How do the Saleae protocol decoders compare with the ZeroPlus ones? Does the ZP come with more/better protocols available and supported?
 

Offline janoc

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #15 on: September 02, 2017, 07:59:31 pm »
I actually have one of the low end analyzers. As Dave guessed, they are hackable. You can expand the 16 channel model to 32 channels by populating the input frontend on the PCB (basically the 16'245 and a few passives). Also you can increase the channel memory in software to 128k per channel or beyond by replacing the memory chip with a larger one. This make them good value for the hobbyist. Information how to do this is easylin found on the internet.

I foun that indeed, if you are used to the Salea software, the Zeroplus software seems ancient and clumsy. But it is quite powerful and I could do what I wanted to do with it. Also the device is supported by Sigrok, so if you are willing to invest some time, you can even roll your own protocol decoders.

I believe that at least the low end ZP analyzers can be used with Sigrok as well. I have found the Sigrok sw comparable to the Saleae one - perhaps not as polished, but certainly works well and has/had more features than the rather basic Saleae sw. There are also tons of plugins and decoders available for it too.
 

Offline alm

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #16 on: September 02, 2017, 08:11:30 pm »
How does protocol decoder performance compare these days for long captures between Sigrok and the commercial Saleae or Zeroplus software?
 

Offline TK

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #17 on: September 03, 2017, 04:20:49 am »
How do the Saleae protocol decoders compare with the ZeroPlus ones? Does the ZP come with more/better protocols available and supported?
Zeroplus offers over 115 protocols.  Some protocols require 32 channels and/or higher sample rate and they are not enabled on the low end models
 

Offline MattSR

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #18 on: September 03, 2017, 05:16:51 am »
Far out, wow! Which protocols need that many channels?
 

Offline alho

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #19 on: September 03, 2017, 11:13:36 am »
250$ for Arduino and 8 ch. logic analyzer seems a bit much compared to Zeroplus LAP-C 16032 130$ and 16 channels. Dave should do teardown and review of the LAP Educator that comes whit the kit.

http://www.zeroplus.com.tw/logic-analyzer_en/products.php?pdn=1&product_id=711
http://amzn.to/2w2LS08
http://a.co/aTHtjPZ

Far out, wow! Which protocols need that many channels?

PCI and IDE http://www.zeroplus.com.tw/logic-analyzer_en/products.php?pdn=10&pdnex=list

 

Online nctnico

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #20 on: September 03, 2017, 11:52:31 am »
PCI and IDE are obsolete. It is rare for me to have more than 16 channels connected when debugging an FPGA based design.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline janoc

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #21 on: September 03, 2017, 02:37:54 pm »
How does protocol decoder performance compare these days for long captures between Sigrok and the commercial Saleae or Zeroplus software?

Can't speak about ZP, don't have it, but the decoding in Sigrok seemed a bit faster than Saleae and certainly has more decoders available (or used to have, didn't check recently). On the other hand, it depends on what you mean by "long capture". I didn't try decoding longer than about a minute of USB low speed data with it. It was certainly usable for that.
 

Offline janoc

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Re: EEVblog #1018 - ZeroPlus Logic Analysers
« Reply #22 on: September 03, 2017, 02:39:47 pm »
PCI and IDE are obsolete. It is rare for me to have more than 16 channels connected when debugging an FPGA based design.

Maybe obsolete for what you are doing, but both of these are still around and kicking - a lot of industrial and lab hardware still supports them and new cards are made for them.
 


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