Author Topic: EEVblog #529 - HP 35660A DSA Upgrade Investigation  (Read 21588 times)

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Offline innkeeper

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Re: EEVblog #529 - HP 35660A DSA Upgrade Investigation
« Reply #25 on: August 24, 2018, 02:46:12 am »
I would be very curious about what you see.

from what I gathered from earlier statements though there might be practical limits on the ADC.
Hobbyist and a retired engineer and possibly a test equipment addict, though, searching for the equipment to test for that.
 

Offline chuckb

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Re: EEVblog #529 - HP 35660A DSA Upgrade Investigation
« Reply #26 on: August 24, 2018, 03:18:29 am »
I ordered a spare input pcb for my HP35665A and I will first characterize that and then modify it over the next few weeks. The 35660A schematic shows 7k of resistance (11 nv / rt Hz) for protection before the JFETs. So that will set the white noise lower limit. The 20nV / rt Hz flicker noise corner will be moved from 10 Hz down to 0.1 Hz with the new JFET and op amps. The white noise floor will probably be reduced from 22nV / rt Hz to 11nV.

The LT1028 has to much current noise for the given circuit impedance. The LT1007A or another may work better. The first 4 NE5534s will be upgraded because they provide up to 24 dB of gain and establish the noise floor. There are many more NE5534s in the Anti Aliasing filter but they should not be impacting the noise floor because they work with a larger signal.

I would think the ADC sets the dynamic range (14 bit) of the system but the first gain stages should set the noise floor. We will see.
 

Offline precaud

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Re: EEVblog #529 - HP 35660A DSA Upgrade Investigation
« Reply #27 on: August 24, 2018, 12:52:00 pm »
I would think the ADC sets the dynamic range (14 bit) of the system but the first gain stages should set the noise floor. We will see.

I thought HP promoted these as 12 bit systems, is it really a 14-bit ADC?
 

Offline chuckb

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Re: EEVblog #529 - HP 35660A DSA Upgrade Investigation
« Reply #28 on: August 24, 2018, 01:39:17 pm »
Looks like my memory was wrong again.
The specs for the 35665A have the noise floor at -76 dbfs which would be 12 bits. The resolution is 0.016% which is between 12 and 13 bits.
It works great for what I need.
 

Offline precaud

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Re: EEVblog #529 - HP 35660A DSA Upgrade Investigation
« Reply #29 on: August 24, 2018, 01:48:29 pm »
Yeah, 12 bits is fine for a lot of uses, especially with averaging.
My recollection is, in terms of resolution, the HP DSA lineup was:

35660A/35665A = 12 bit
3562A = 14 bit
3567A/3565S = 16 bit (I have one)
35670A = 16 bit

Amazingly, the 35670A is still in production, but is scheduled for discontinuation later this year. It's had a very long run.

 

Offline chuckb

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Re: EEVblog #529 - HP 35660A DSA Upgrade Investigation
« Reply #30 on: August 24, 2018, 08:35:02 pm »
Today I'm using the 35665A to plot the performance of a 4 pole 10Hz low pass filter. The DSA source is monitored on CH 1 and the filter output is monitored on CH 2. This is with 800 lines resolution and 0-400 Hz span. After 1000 averages the CH 2 maximum rejection displayed is -89dB below the 8 Hz reference amplitude.

The FREQUENCY RESPONSE display shows -110dB of rejection in the filter at 200 Hz referenced to the amplitude at 8 Hz. After 10 averages I could read -100 dB of rejection. I'm not sure how things are processed for the FREQUENCY RESPONSE function vs just looking at the CH 2 amplitude. That's a pretty good dynamic range for a 12 bit ADC! Maybe dithering helps a lot here.

It works great for what I need but, I will try some modifications to reduce the front end noise.
« Last Edit: August 24, 2018, 08:45:48 pm by chuckb »
 
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