EEVblog 1524 - The 10 CENT RISC V Processor CH32V003

[chickenHeadKnob]

The dev board (including USB interface board and 5 bare 20 pin chips) is back in stock at the official WCH store on Ali. US$5.51 plus shipping (which was US$6.69 to New Zealand when I bought one in November)

https://www.aliexpress.us/item/3256804709476544.html

I just bought a bag of 50 bare chips tsop 20 on Jan 16 (the last unit -sorry guys) from the official WCH aliexpress store. So they are becoming available in fits and bursts.

[rhodges]

I just ordered the two-board kit and 50 each of 20 and 8 pin chips an Aliexpress. Combined shipping was $15, for $40 total.

I got the datasheet and reference manual, but does anyone know where to find the errata?

Now I am reading the Risc-V specification. I really like the commentary on how and why decisions were made.

[EEVblog]

I just bought a bag of 50 bare chips tsop 20 on Jan 16 (the last unit -sorry guys) from the official WCH aliexpress store. So they are becoming available in fits and bursts.

You can apparently order large quantity if you contact them direct.

[brucehoult]

Now I am reading the Risc-V specification. I really like the commentary on how and why decisions were made.

An interesting point that is kind of implied but not made explicit is that RISC-V was originally designed as a 64 bit ISA, with the 32 bit version a bit of an afterthought.

Cutting it down to a version with only 16 registers was definitely a very late afterthought, basically along the lines of "some people are going to do this anyway, so we might as well standardise it". A 64 bit ISA with 16 registers (RV64E) was definitively ruled out for a long time, but now opinion is moving to "No, that's actually useful for a small control core on an otherwise 64 bit SoC ... and it's easier to allow it than to forbid it".

The C extension for 2-byte instructions was optimised around SPEC, including giving SPECfp a high weighting, so it's not really ideal for microcontrollers, and in particular Thumb2 code ends up a bit more dense. Recent RISC-V standard extensions such as Zb* ("B") and Zc* seem to have closed the gap, or even reversed it.

RV32E code also ends up less dense than RV32I because it's more often necessary to spill values from registers to the stack.

Still, 8051 and PIC and so forth are hardly ideal ISAs. The benefits of a 32 bit ISA designed from the start to support high level languages such as C are pretty large, as are leveraging compiler and other software work from bigger machines. And, of course, the benefit of anyone with a bright idea for a new CPU core (bigger or smaller) being able to just use the ISA and everything around it without having to get permission from ARM or Intel or anyone else.

A lot of people say "Why do you need zero license fee, when ARM's fees are so reasonable?" But that's not the point. Permission and contracts and contract disputes are the far bigger point. Just ask Qualcomm and Nuvia.

[EEVblog]

A lot of people say "Why do you need zero license fee, when ARM's fees are so reasonable?" But that's not the point. Permission and contracts and contract disputes are the far bigger point. Just ask Qualcomm and Nuvia.

Even saving one cent per chip can matter.
Building a million widgets, each 1 cent saving is $10k extra profit

[SiliconWizard]

Yes, but it involves developing your own core. RISC-V is just an ISA. ARM sells cores, not an ISA. Kinda big difference.
And from what I've seen, licensing fees from the current major sellers of RISC-V cores are not really cheaper than ARM's. Often the opposite (which is understandable though due to scale factor that ARM has had for a long time now.)

Sure you can always go from an open-source core and build around that, but that's still significant work, no support and the open-source license attached to the one you pick must fit your business model.
All this is very far from just picking an ARM core, paying a fee and pretty much calling it day, for the most part.

So the comparison must be made with all factors taken into account. This works if you're a big company selling millions of devices indeed, with the cash to invest in significant R&D to develop your own silicon. That's not for the small (or even medium-size) company. For those chinese companies selling ultra-low-cost chips by tens of millions, RISC-V is sure a fantastic opportunity.

[brucehoult]

Sure you can always go from an open-source core and build around that, but that's still significant work, no support

While there are probably hundreds of RISC-V cores on github that were created by someone in a weekend and (maybe) tested on an FPGA, there are also a significant number that are of demonstrably very high quality and have been proven in silicon many times.

Obvious examples include Berkeley Rocket and the Pulp Platform (ETH Zurich & University of Bologna) cores now known as CV32E40P, CVA6, Ibex. If you're not prepared to invest $10m in core design then don't even think about making your own instead of one of these.

SiFive's first FE-310 and FU-540 SoCs in 2016-17 are almost straight Rocket (and the improvements they made then have been fed back into the Open Source project). The Kendryte K210 (dual core 64 bit 400 MHz microcontroller from 2019) appears to be absolutely unmodified Rocket, with some extra stuff added around it. That chip has shipped in probably the tens of millions if not hundreds of millions.

Pulp Project cores have been used in ESA spacecraft.

and the open-source license attached to the one you pick must fit your business model.

Rocket is BSD license. Pulp cores are lightly modified (for hardware) Apache 2.0.

All this is very far from just picking an ARM core, paying a fee and pretty much calling it day, for the most part.

If only it was as simple as going on the ARM web site, picking an option, digitally signing a contract, and putting in your credit card number!

Reports from many people who have been there and done that is that negotiating the contract and fees for even the simplest ARM core is a 12 to 18 month process involving many expensive lawyers, before you can even start the technical work.

The biggest technical difference is that with the cheaper ARM licenses what you get for the core is a hard macro that is pre-laid out for a specific process node. You just connect your own circuitry to the input and output wires of the core. While you can't modify the core in any way, you also don't have to do the physical layout and verification of it.

More expensive ARM licenses, and probably all current RISC-V cores, are delivered to you as RTL (possibly obfuscated) and you the customer are responsible for physical layout.

[reimius]

First my apologies in advance if I did not well enough research, but there is something that I am being missed I believe, let me share.

The Reference manual: CH32V003RM.PDF (http://www.wch-ic.com/downloads/CH32V003RM_PDF.html) says that at the very first paragraph the ISA implemented is RV32EC which stands for the 16-bit long instruction extension and the reduced register file from 32 to 16 registers.

What confuses me, is about the C extension, is just that, an extension to a base ISA like the I base, so to improve code density. But itself the extension is that, an extension it cannot even address all 16 registers for some of the instruction, only the higher 8 (of 16). The specification (The RISC-V Instruction Set Manual Volume I, 20191213) even says that the Standard C extension is mean to be on top of a base extension. Source: riscv-spec-20191213.pdf (https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf)

So here is the question is, what is the actual base ISA for this chip? I guess is the RV32I, but I cannot find a reference to it. I believe this can be a point, for example, if you want to do a pin toggling to know which instructions are really available!

[brucehoult]

What confuses me, is about the C extension, is just that, an extension to a base ISA like the I base, so to improve code density. But itself the extension is that, an extension it cannot even address all 16 registers for some of the instruction, only the higher 8 (of 16).

Yes, specifically r8-r15, the same as when applied to RV32I or RV64I. They happen to be the hi 8 registers in RV32E, yes, but not in the others.

This is no different to ARM Thumb/Thumb2, in which it is the low 8 registers that can be used by all 2-byte instructions, with several of the high 8 registers performing implicit jobs (PC, LR, SP). In RISC-V it is similar, but it is the low registers with implicit uses: Zero, RA (LR), SP.

In Thumb the 2-byte instructions that can use all 16 registers are MV, ADD, CMP, BX, PUSH, POP.

In RV32I/RV32E, the 2-byte instructions that can use all 32 (or 16) registers (with some individual exceptions for combinations that don't make sense) are:  C.LI, C.LUI, C.ADDI, C.SLLI, C.MV, C.ADD, C.LWSP, C.SWSP.

So here is the question is, what is the actual base ISA for this chip? I guess is the RV32I.

No, the base ISA is RV32E.

RV32E is not an extension of RV32I, it is its own base ISA defined by "Copy RV32I, hard coding the MSB of all register fields to '0'. Instructions with a '1' in those positions are undefined reserved instructions."

[EEVblog]

FYI, WCH just contacted me and said they saw the video which has been very popular and have offered me parts. What should I get? 

[reimius]

So here is the question is, what is the actual base ISA for this chip? I guess is the RV32I.

No, the base ISA is RV32E.

RV32E is not an extension of RV32I, it is its own base ISA defined by "Copy RV32I, hard coding the MSB of all register fields to '0'. Instructions with a '1' in those positions are undefined reserved instructions."

There you go! My bad, I was thinking that E was an extension, definitely I read the riscv specs too fast, it  clearly states: "RV32E base integer instruction set" even the word Base is in the title of the chapter 

Thanks Bruce!

[Sacodepatatas]

FYI, WCH just contacted me and said they saw the video which has been very popular and have offered me parts. What should I get? 

The CH582M is a very interesting IC. It is also RISC-V, around 1€/pc, , It has two USBs, one USB host, and Bluetooth frontend, along with the typical periferals of the CH32VXXX. Some cheap development boards (about 3-4€) are appearing for buying, also there is a port to Arduino currently being developed.

[wdbarker3]

Dave, I know you were pleased to do the blinky. But . . .

My CH32V's arrived today, and before hookinhg up the IDE and the demo chip, I plugged it in. D1 blinked at 250ms on/250ms off. I'm sure glad you tried other durations in your test, but that first one didn't demonstrate much<g>!

Now, to re-remember Eclipse . . .

[3roomlab]

I just want to share something I tried regarding translating chinese pdf into english

in the amphour #619, there is some mention about PUYA mcu.
https://www.lcsc.com/products/Microcontroller-Units-MCUs-MPUs-SOCs_11329.html?brand=11580

https://www.puyasemi.com/cpzx3/info_271_aid_247_kid_246.html
the spec pdf download is a whooping 149MB, and you get the entire product folder.

so to do the translating, I used libreoffice 6.4 + pagetranslate.oxt extension
The translator add-on requires access to internet to work
1 page needs about 10s to process (the internet meter runs about 400kbps for 10s)
I tried 4 pages for sample viewing, and below I attached 1 of them

the pdf conversion have some quirks and some misses, the text come across as boxes everywhere.
Manual stitching was not that bad, each page takes about 3-5minutes of fiddling around.
(and abt 1 hr of libreoffice setup if you are not on it)

so there is a good chance anybody can use this method to translate straight from their chinese pdf
I suppose a professional OCR is better, but I have not tried those.

1 of the quirks is that the stitched text will shoot beyond the right margin
in my lazy mode, I changed the page size to A3 landscape and simply ignore more manual fiddling with boxes, this saves time.
I hope this could be of some help 

[thm_w]

I just want to share something I tried regarding translating chinese pdf into english

Did you try the google pdf translator?

edit: Interesting that every PDF link is just a RAR of the entire datasheet collection..

[3roomlab]

I just want to share something I tried regarding translating chinese pdf into english

Did you try the google pdf translator?

edit: Interesting that every PDF link is just a RAR of the entire datasheet collection..

I was reading the pagetranslate.oxt extension web page and it says it uses google translate
and here I forgot all about source itself which is google document upload function *facepalm me!*

[SiliconWizard]

FYI, WCH just contacted me and said they saw the video which has been very popular and have offered me parts. What should I get? 

All of them?

[BlakeSeven]

Try their little 8 pin CH32V003 J4M6?

[willmore]

I just got my parts in from Ali.  I got 50 J4M6 (because why not?), 50 F4P6, and the WCH-LinkE+F4P6 dev board (and 5 more chips).

I've got the dev environment (ch32v003fun) running and I've programmed the dev board with the blink and ws2812b examples and they work.  So, that was fun.  I haven't tried programming the 8 pin chips yet as I'd like to know more about how their I/O works.  There's a lot of I/O stuffed onto 6 pins.  In particulat, I want to know about the limitations WRT programming over SWIO (pin 8, PD1) which is shared with a lot of other functions.  I have no idea if you can use that pin as an I/O *and* for programming or how that works.

If you can't share that pin, then something as simple as the default blink code (which uses PD4--pin 8 of the J4M6) would effectively make the part OTP as it's not going to be SWIO anymore.  I'd like to get some clarification on that before I commit too much.

My intention is to design a dev board for the two variants I got, but I'll want to get a little more experience with them before I make boards.  I also want to find a cheap USB-C socket to use--I've used up all the micro-USB-B sockets I had and I'd like to move up to C.  Suggestions welcome.

I'm not new here, I had an account a long time ago and somehow it got lost, so I recreated it today.  Hello, all!

[rhodges]

I haven't tried programming the 8 pin chips yet as I'd like to know more about how their I/O works.  There's a lot of I/O stuffed onto 6 pins.  In particulat, I want to know about the limitations WRT programming over SWIO (pin 8, PD1) which is shared with a lot of other functions.  I have no idea if you can use that pin as an I/O *and* for programming or how that works.

Here is my story:
https://www.eevblog.com/forum/microcontrollers/ch32v003-j4-(sop8)-pins/msg4726238/#msg4726238

If you can't share that pin, then something as simple as the default blink code (which uses PD4--pin 8 of the J4M6) would effectively make the part OTP as it's not going to be SWIO anymore. 

Yes, indeed. A large timeout after reset and before configuring the pin might be okay for development.

[willmore]

Thank you, that's one of the sources of my concern.  I was searching for that thread and didn't find it.  Thank you for finding me.

Another one is a reference I found from one of the programming tools that the ch32v003 are unbrickable as long as you have acces to the NRST pin.  Then I looked at the J4M6 pinout and saw that it *didn't have* that signal.

I like your suggestion to have a large timeout before setting that pin to output.  I'll keep that in mind as I explore more about these chips.  There's a lot of info out there, but it's not well organized and that's being charatible.

[brucehoult]

Thank you, that's one of the sources of my concern.  I was searching for that thread and didn't find it.  Thank you for finding me.

Another one is a reference I found from one of the programming tools that the ch32v003 are unbrickable as long as you have acces to the NRST pin.  Then I looked at the J4M6 pinout and saw that it *didn't have* that signal.

So do your development on a chip with 20 pins, e.g. the ones on the official dev board or for that matter the $1.50 "nano" board (below, mine came joined in snap-off sets of three)

[ballsystemlord]

So, where are these RISC-V processors being sold for $0.10 each? I watched the whole video, looked at all linked content, searched on Aliexpress and ebay. I can't find them that cheap, even in 100pcs (bulk) quantity.

[SiliconWizard]

So, where are these RISC-V processors being sold for $0.10 each? I watched the whole video, looked at all linked content, searched on Aliexpress and ebay. I can't find them that cheap, even in 100pcs (bulk) quantity.

Are you saying that the title may have been a bit of a clickbait?

Now, the CH32V003 is listed at $0.13 - $0.15 at LCSC per 500+ (even if it's not actually available there at the moment), so I have no doubt you can get it for $0.10 or less at large quantities... as long as you ca get ahold of them.

[DavidAlfa]

Why so much hype about the CH when the Puya seems way better for the same price?