### Author Topic: EEVacademy Digital Design Series Part 5 - Karnaugh Maps  (Read 2684 times)

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#### EEVblog

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##### EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« on: June 12, 2023, 11:23:28 pm »
Digital logic circuit simlification using Karnaugh Maps.
How to use a visual method to solve boolean algebraic equations and truth tables.
Part 5 of the digital logic design tutorial series.

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#### TimFox

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #1 on: June 12, 2023, 11:42:47 pm »
My favorite feature of Karnaugh maps is that you can easily insert "don't care" states into a map.

#### EEVblog

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #2 on: June 13, 2023, 05:53:25 am »
My favorite feature of Karnaugh maps is that you can easily insert "don't care" states into a map.

I was going to incude don't cares but totally forgot to mention it

#### tggzzz

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #3 on: June 13, 2023, 08:01:23 am »
My favorite feature of Karnaugh maps is that you can easily insert "don't care" states into a map.

More interestingly, they show which "bridging terms" are necessary for glitch free operation of asynchronous circuits.

For those that think async circuits' behaviour is unimportant, consider:
• latches and flip-flops are asynchronous internally
• "discrete" logic designs often have asynchronous circuits, sometimes driving clock/reset lines.
• if, in a synchronous design, one of the signals takes more than one clock cycle to settle, then you may find asynchronos problems that aren't flagged by most digital simulators

Example of 2: I saw someone else's machine where that caused a car-sized bit of metal to move uncontrollably at several m/s until hitting the big red emergency button cut all power

Example of 3: I accidentally created a design which simulated correctly in an inertial delay simulator, but a transport delay simulator revealed the potential problem. Just as well, since respinning the implementation would have taken 3 months and several years salary.
There are lies, damned lies, statistics - and ADC/DAC specs.
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#### EEVblog

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #4 on: June 13, 2023, 12:06:05 pm »
The price I pay for doing tutorials:

#### tggzzz

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #5 on: June 13, 2023, 12:38:26 pm »
The price I pay for doing tutorials:

Authors and viewers assess price/cost differently. I don't see a way of avoiding that.

The price I pay for watching a video is to lose 10X minutes of my remaining life whereas speed reading the same information would only take X minutes. Those 9X matter to me, and hence even yootube static pages don't appear in my browser In other words, if there isn't a 150 word "elevator pitch" to the effect of "if you watch this then you will gain knowledge of A1, A2, A3, B, C", then there are better things for my eyeballs to settle on

« Last Edit: June 13, 2023, 12:41:17 pm by tggzzz »
There are lies, damned lies, statistics - and ADC/DAC specs.
Glider pilot's aphorism: "there is no substitute for span". Retort: "There is a substitute: skill+imagination. But you can buy span".
Having fun doing more, with less

#### WIMPy

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #6 on: June 17, 2023, 01:45:59 am »
Wow. This video has already been online for four days, but noone has complained that the solution for the second example is not the most optimal.
Following rules will always give a good result. But as humans we are often really good at spotting patterns.
The result used 10 gates with a total of 18 inputs.
I claim it can be done with 9 gates and a total of 16 inputs.

#### EEVblog

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #7 on: June 17, 2023, 05:37:20 am »
Wow. This video has already been online for four days, but noone has complained that the solution for the second example is not the most optimal.
Following rules will always give a good result. But as humans we are often really good at spotting patterns.
The result used 10 gates with a total of 18 inputs.
I claim it can be done with 9 gates and a total of 16 inputs.

Are you taking into account my correction at 18:35?
I made an editing mistake and didn't extend the correction past like a minute or something.

#### WIMPy

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #8 on: June 17, 2023, 03:42:55 pm »
Are you taking into account my correction at 18:35?
I made an editing mistake and didn't extend the correction past like a minute or something.

Ah, right. I fell for the fact that you first added that NOT, but didn't notice that it magically vanished again.
So with that missing NOT, we actually have 19 inputs on 11 gates for the Karnaugh method.

Who noticed that the bottom half is the same as the top half rotated by two bits?

#### Smokey

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##### Re: EEVacademy Digital Design Series Part 5 - Karnaugh Maps
« Reply #9 on: June 17, 2023, 10:14:09 pm »
The price I pay for doing tutorials:

Good thing the supply of good stuff from the dumpster hasn't dried up

Smf