Surprising to see that current clamp on the 50Hz mains input for presumably the AC trigger (or would that be on the PSU daughterboard). Wouldn't a current coil give a current instead of voltage trigger? (Or is my sleep deprivation making me think that
)
How would they guarantee that the power factor (correction) of the main PSU is predictable and constant? And wouldn't the PFC (slightly) change depending on the load on the PSU?
So what would happen if you change the screen brightness or use a high power device from the USB ports? Or the mains voltage changes? How low would the jitter/accuracy be?
Maybe something interesting to test because intuitively I would have my doubts whether probing the current waveform would really give that stable of a 50Hz trigger source.
Other than that the design looks great.
Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.
Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.
Untimately I don't think that's too much to do a modern FPGA. Although it does have a heaksink so I guess it's doing somethign reasonably complex.
Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.
Would need Keysight to release the architecture details but my guess is it is likely the waveforms are being aggregated/overlaid/plotted in the ASICs.
Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.
Would need Keysight to release the architecture details but my guess is it is likely the waveforms are being aggregated/overlaid/plotted in the ASICs.
IIRC that's what the Megazoom IV did. So this would be no different.
Surprising to see that current clamp on the 50Hz mains input for presumably the AC trigger (or would that be on the PSU daughterboard). Wouldn't a current coil give a current instead of voltage trigger? (Or is my sleep deprivation making me think that )
There is no spec for line trigger that I see, just that it exists. I don't know anyone who would use line trigger and then just expect that its super accurate and dead on the zero crossing of the voltage? You'd probably have one probe watching the voltage, one on current, so you can do some power calculations as well.
So zero crossing of the PFC current is probably "good enough", but I see your point. I wonder if someone was being a smartass and will get caught out when some major customer tries to use it and it doesn't work as expected.
From what little I understand, accurate clocks are important in scopes. I see a few crystal oscillators on the boards, but is there some other chip doing more accurate clocking? I ask because it wasn't covered in the teardown and I was thinking that the impressive noise floor that they got had to come, in part, from reducing clock jitter.
Thanks!
From what little I understand, accurate clocks are important in scopes. I see a few crystal oscillators on the boards, but is there some other chip doing more accurate clocking? I ask because it wasn't covered in the teardown and I was thinking that the impressive noise floor that they got had to come, in part, from reducing clock jitter.
Thanks!
You can see the teardown images here:
https://www.flickr.com/photos/eevblog/53984805898/in/album-72177720320207221I would guess the main one is that 10MHz crystal with the LMX2572 beside it:
https://www.ti.com/product/LMX2572
Surprising to see that current clamp on the 50Hz mains input for presumably the AC trigger (or would that be on the PSU daughterboard). Wouldn't a current coil give a current instead of voltage trigger? (Or is my sleep deprivation making me think that )
I think they do it this way so they don't have to have a custom, modified PSU with a mains input voltage conditioning circuit, with its own isolation. They get to use a bog standard TDK Lambda unit, unmodified.
Surprising to see that current clamp on the 50Hz mains input for presumably the AC trigger (or would that be on the PSU daughterboard). Wouldn't a current coil give a current instead of voltage trigger? (Or is my sleep deprivation making me think that )
I think they do it this way so they don't have to have a custom, modified PSU with a mains input voltage conditioning circuit, with its own isolation. They get to use a bog standard TDK Lambda unit, unmodified.
Yes that is why they do it, but his point was that its not going to be as good as a traditional voltage tap.
Aluminium sticker is not "Warranty Void".
It is a genuine "EMC Void" sticker
Also surprising choice to see 2 "scopes on a chip" that are then combined together with presumably 1 FPGA. That FPGA would have to do at least some extra lifting to put a display frame together on the screen with GUI around it, but also handle the framebuffers of each individual intensity graded waveform (+LA +SA?), The position & draw order can all change, so it would have to handle that all in hardware too.
IMHO When you design the Megazoom V, you design it in a way so that the chips will work with each other. Either shared memory (parts of it) or dedicated communication interface or anything else that might be required to do the heavy lifting. I'd wager, that they can also connect 4 of them together to make 8 channel scopes, and the HD4/5/6 series will be just that.