EEVblog #245 - PSU Design Part 10 - PCB Layout Editing

[Christe4nM]

Hi Dave,

Great to see how you route your boards. By watching an experienced engineer do these things I learn a lot more than just by reading my textbooks. (EE bachelor-student speaking here)

Now I do have a question. You say you keep in mind all sorts of rules, the schematic, etc: lots of stuff that’s become intuitive to you. Now during introduction classes on PCB design last year  one of the main rules was to avoid your traces curve so much that between start and end you’ve got a large area. If I recall correctly it had to do mostly with inductive coupling, and becomes more important for higher frequencies. What surprised me a in your design were a couple of long traces doing exactly that. A small example is a short trace from ISP connector to AVR chip that comes in from the bottom right, goes around a few AVR pins, and then connects to its pin from the top left. But I also saw it in larger scale. I just had to ask: why? I know there’s a lot (!) more to PCB layout than the basic (EMC) rules so please enlighten me.

Also I’ve been taught to always try to minimize distance between those that are a differential pair, just like you do. Does that only apply to positive/negative supply traces and signal send/return traces? If not, in what (common) situations do you have to take extra care?

And lastly, at a first glance your layout seems quite a maze here and there: traces going between pins curving a lot until reaching destination. It seemes you just put them where there’s space. Now I know about your intuitive knowledge and experience, but I wondered if that doesn’t give you problems in terms of capacitive or inductive coupling. Could you explain why/when that is, or is not, a problem? And maybe give some insight in your thoughts in the process?

Thanks for sharing your knowledge, and thanks in advance for replying!

Kind regards,
Christean

[mariush]

Let me also add a question.

I see a lot of space wasted on the board with those resistors. Under some, you have traces going, but under a lot of them there's nothing going on.
I'm wondering why aren't you designing the footprint smaller and just make the decision to mount the resistors vertically - after all I see there are axial forming machines that do these kinds of mounting positions so it's not some improvisation:



All the ones on the bottom row have about the same footprint.
Is there something inherently bad about the resistors being mounted vertically, more heat per square inch or something like that for example?

Also, once you go to two layers... why struggle to keep everything on one layer? You're spending the money for a two layer so why not make the traces "prettier" and easier to follow to beginners?  For example instead of going all the way around in the left corner with 2 traces to avoid the 2x8 DIP chip or whatever that is, why not do some vias and go with the traces UNDER that chip and keep traces smaller and design less messy?

[ejeffrey]

Now during introduction classes on PCB design last year  one of the main rules was to avoid your traces curve so much that between start and end you’ve got a large area.

If you have a ground plane, the loop area is only the trace length times the board thickness.  You don't want to make traces longer than necessary, but especially on a board like this where nothing is high speed a few extra cm isn't going to kill you.  The way you get killer inductance is if you don't allow a proper path for return current underneath your signal trace.  If you have a 10 cm trace with a ground plane the loop area is 160 mm^2.  On the other hand, if the return current has to follow another trace 1 cm away, the loop area is now 1000 mm^2.

Also I’ve been taught to always try to minimize distance between those that are a differential pair, just like you do. Does that only apply to positive/negative supply traces and signal send/return traces? If not, in what (common) situations do you have to take extra care?

Differential pair routing only matters for differential signals.  Many high speed serial protocols (USB, SATA, PCIe, and ethernet) use differential pairs.  Usually these pairs are also controlled impedance.  Analog differential signals also exist.  They do not usually require controlled impedance, but they should be routed close together to limit inductive coupling of noise.

And lastly, at a first glance your layout seems quite a maze here and there: traces going between pins curving a lot until reaching destination. It seemes you just put them where there’s space.

Dave is using a 2-sided board while trying to keep most of the tracks on the component side to leave the bottom as a nearly intact ground plane.  In this case, routing where there is space is pretty much the only option.

Now I know about your intuitive knowledge and experience, but I wondered if that doesn’t give you problems in terms of capacitive or inductive coupling. Could you explain why/when that is, or is not, a problem? And maybe give some insight in your thoughts in the process?

This is a low-speed design.  Even the digital parts are fairly low speed and the analog parts are mostly at DC.  Even though it is relatively high precision for a bench power supply, the analog side is not super high spec either.  That isn't to say you couldn't screw up the layout by running the SPI bus lines under the regulators reference input, but it certainly isn't the most critical layout ever.

[Christe4nM]

Hi eJeffry,

Thanks for your reply. It answers my questions very well. It seems that my inexperience with groundplanes in PCB design plays up. Until now my school projects were with singlesided PCBs only.

To sum your reply:
When you have a groundplane, the return current 'automatically' follows the traces on top so it becomes a lot easier to incorporate EMC rules. The most important thing to remember is to keep vias/traces through the groundplane as short as possible because they "block" the current flow, causing the current to take a detour, which does result in area.

Also the relatively low frequencies in this particular design give you a bit of freedom as opposed to higher frequencies where design rules are way more critical.

(Sorry for using a simple way of saying this, I think I understand it well, but trying to write it down in correct English is another thing ;-)

[Zad]

There is a saying which goes "when all you have is a hammer, everything looks like a nail". I think sometimes colleges teach students how to use advanced analysis and design tools, and forget that sometimes it really is a nail, and really does just need a hammer.

It is easy to get hung up on ideal HF paths, currents paths across sensitive analogue parts causing problems, altering component types and optimising board area etc. For the most part, this is a low power board, operating at low frequency, with no emissions testing or special requirements. You could build it on perf board and wire salvaged from an old washing machine and it would still work fine. This circuit could be done on a single sided board with a few wire links but, as Dave pointed out, a double sided PCB costs no more.

Outside the micro, the fastest part is the I2C bus, which operates at 400kHz, so the highest frequency you are likely to see on there is 4MHz. A rule of thumb is that anything smaller than 1/10th the wavelength of the highest frequency is negligible. In this case the wavelength is 75M. So long as you keep those spiky edges away from the regulator reference (which is probably filtered anyway) you should be fine.

[Jad.z]

Dave, if you ever get bored with electronics, you can always work as a sports commentator 

[caroper]

Dave, if you ever get bored with electronics, you can always work as a sports commentator 

He could only do Car or Horse racing though because his specialty is Track Side

[EEVblog]

There is a saying which goes "when all you have is a hammer, everything looks like a nail". I think sometimes colleges teach students how to use advanced analysis and design tools, and forget that sometimes it really is a nail, and really does just need a hammer.

It is easy to get hung up on ideal HF paths, currents paths across sensitive analogue parts causing problems, altering component types and optimising board area etc. For the most part, this is a low power board, operating at low frequency, with no emissions testing or special requirements. You could build it on perf board and wire salvaged from an old washing machine and it would still work fine. This circuit could be done on a single sided board with a few wire links but, as Dave pointed out, a double sided PCB costs no more.

Yep, that pretty much sums it up.

Dave.