EEVblog #342 - Agilent 90000 Oscilloscope Teardown

[EEVblog]

! Private video

Dave.

[JoannaK]

Nice.. Wonder though what were those massive chips next to Virtex4 ..

Pitty about the wondows+touch screen, but can't have it all.. not even with that high price.

[Monkeh]

Looks like a standard mATX layout. I get the feeling that the two SATA cables on the main board are not being used as SATA. Just a convenient connector and cable. Could easily be taking a few PCI-E lanes out, actually.

Other than that, I just see a PCI card for the GPIB, an unpopulated PCI-E x4 slot, a pretty ordinary header being used for something unexciting, some USB 2.0 headers.. PWM fan control. Power seems to be standard ATX, but there's an extra connector there.. Perhaps standby power or a ready signal.

It's definitely a custom board but nothing particularly special.

[oPossum]

The blue cable is 2 USB, not SATA.

[T4P]

The unpopulated PCI-E x4 is for the high speed offload upgrade 
I see the massive number of fans even so
4 fans on the side
1 cooler master fan Okay, so it's a LGA775 processor if the processor is recent it should be the Pentium Dual Core E6700/E5700/E5400
1 smaller fan
1 centrifugal fan/blower/squirrel fan

3 heatsinks on the mATX itself
1 for the CPU
1 for the Northbridge
1 for the southbridge

8 heatsinks on the power board

10 heatsinks on the front end board ... What's the power consumption like dave? 500W?

[Short Circuit]

Customized version of the Adlink M321, the two SATA's don't exist on the standard board.


http://www.adlinktech.com/PD/web/PD_detail.php?cKind=FN&pid=802&seq=&id=&sid=

[Monkeh]

The blue cable is 2 USB, not SATA.

No it's not. The USB cables are grey.

Customized version of the Adlink M321, the two SATA's don't exist on the standard board.


http://www.adlinktech.com/PD/web/PD_detail.php?cKind=FN&pid=802&seq=&id=&sid=

Or the M321 is a marketed version of the board they were contracted to build by Agilent.

[Eliminateur]

how does the "analog/digital" infiniium part interfaces with the PC portion?, that's a a good mystery...
Could that blue "SATA" be used as a pcie 1x cable?, it's entirely possible as it's two differential pairs and the signalrate is well withing spec for a SATA 2 or SATA 3 cable...
Where's the SATA storage?, they implemented some SSD on that backplane?, wouldn't it have been far easier to put a DOM SATA module with power?


Also, how is the LCD being conected to the motherboard? that standout with the twisted pair cables could easily be a LVDS header for the LCD and touch screen....

[Monkeh]

how does the "analog/digital" infiniium part interfaces with the PC portion?, that's a a good mystery...
Could that blue "SATA" be used as a pcie 1x cable?, it's entirely possible as it's two differential pairs and the signalrate is well withing spec for a SATA 2 or SATA 3 cable...

I'm pretty confident that both the 'SATA' cables running to the main board are carrying PCI-E.

Where's the SATA storage?, they implemented some SSD on that backplane?, wouldn't it have been far easier to put a DOM SATA module with power?

There's a perfectly ordinary HDD connected via SATA. It's next to the power inlet.

Also, how is the LCD being conected to the motherboard? that standout with the twisted pair cables could easily be a LVDS header for the LCD and touch screen....

LVDS via the header between the PCI and PCI-E slots. The touchscreen will almost certainly be USB.

[Eliminateur]

ah i haven't seen the entire video yet so i didn't see the SATA HDD....

hmm if those two "funky sata" carry PCIe, then it's 2 lanes(maybe not more than pcie 1.0)..... entirely possible

edit: CCFL backlight on a 140K grand equipment?, that's scroungy...., they should've gone with retina-like ultrahigh dpi display with full white led backlight

[Monkeh]

ah i haven't seen the entire video yet so i didn't see the SATA HDD....

hmm if those two "funky sata" carry PCIe, then it's 2 lanes(maybe not more than pcie 1.0)..... entirely possible

The cables should be entirely capable of supporting PCI-E 2.0. There's no sign of any additional controllers on the board, so I don't see that it could be SAS, and SATA sounds like an obscenely, brain-damagingly stupid way to interface an oscilloscope with a control PC. Even SAS would be dumb (although saner than SATA).

I really think it's just a case of convenient, suitable cables and connectors.

[firewalker]

With this massive fans I was expecting a fair amount of dust inside. Dave, did you had it cleaned?

Alexander.

[T4P]

ah i haven't seen the entire video yet so i didn't see the SATA HDD....

hmm if those two "funky sata" carry PCIe, then it's 2 lanes(maybe not more than pcie 1.0)..... entirely possible

edit: CCFL backlight on a 140K grand equipment?, that's scroungy...., they should've gone with retina-like ultrahigh dpi display with full white led backlight

Go back and edit : This was designed when Windows Vista, go figure
Plus, Agilent isn't going to use any of the Retina-like crap. Requires more graphic muscle to drive that very high refresh rate screen
( Just an info, "retina" is actually worser quality than a TFT display, if they dipped the resolutions lower you see what i mean )

With this massive fans I was expecting a fair amount of dust inside.

I saw some dust! On the heatsinks where the front-end is.

ah i haven't seen the entire video yet so i didn't see the SATA HDD....

hmm if those two "funky sata" carry PCIe, then it's 2 lanes(maybe not more than pcie 1.0)..... entirely possible

The cables should be entirely capable of supporting PCI-E 2.0. There's no sign of any additional controllers on the board, so I don't see that it could be SAS, and SATA sounds like an obscenely, brain-damagingly stupid way to interface an oscilloscope with a control PC. Even SAS would be dumb (although saner than SATA).

I really think it's just a case of convenient, suitable cables and connectors.

SATA 3 is decently quick but the best method is still SATA 3 because PCI-E 2.0 takes 12 lanes to match SATA 3
And checking the ICH10 southbridge it reveals that it only has 4 configurable lanes of PCI-E v1.1
and that the Q45 northbridge only has PCI-E v1.1 16 lanes that cannot be configured
But there's 6 sata 2 ports so i doubt that is PCI-E

[Eliminateur]

a high dpi display would be very nice to prevent aliasing due to crappy low res DPI onscreen and give a more old-style analog display ultimate quality.
and if they need graphic powe then that motherboard is the wrong one, intel 3x/4x chipset have the crappiest GPUs known to man.

i wonder why they haven't blocked any of the normal ports on the back, for example, what happens if you plug a standard vga monitor?, or a mouse/keyboard?.
either they're there to be used or it's an oversight

didn't realize this unit was so old, i tought it was state of the art

[Short Circuit]

...
edit: CCFL backlight on a 140K grand equipment?, that's scroungy...., they should've gone with retina-like ultrahigh dpi display with full white led backlight

Cutting edge consumer class hardware are incompatible with this kind of T&M equipment or industrial stuff in general.
Availability issues when Apple or Samsung boosts a new product, and lifecycle of the part is almost less than the development time of the end product.
When you design a >$100K scope, you prefer to use components that will be available for a reasonable (and guaranteed) amount of time.

[Monkeh]

SATA 3 is decently quick but the best method is still SATA 3 because PCI-E 2.0 takes 12 lanes to match SATA 3
And checking the ICH10 southbridge it reveals that it only has 4 configurable lanes of PCI-E v1.1
and that the Q45 northbridge only has PCI-E v1.1 16 lanes that cannot be configured
But there's 6 sata 2 ports so i doubt that is PCI-E

You want to write some stupid, hacky, bodgeup driver to use a SATA bus for this?

Please ponder what SATA is and ask yourself just how much crack you're doing to even consider using it for this application. Especially stuffed on top of the Windows driver stack.

[Eliminateur]

SATA 3 is decently quick but the best method is still SATA 3 because PCI-E 2.0 takes 12 lanes to match SATA 3
And checking the ICH10 southbridge it reveals that it only has 4 configurable lanes of PCI-E v1.1
and that the Q45 northbridge only has PCI-E v1.1 16 lanes that cannot be configured
But there's 6 sata 2 ports so i doubt that is PCI-E

whaaaa??
first of all, the 16 lanes in the nortbridge are configurable and usable as you want and wish(and i've done it personally), you can plug whatever you want in whatever width you want in those lanes, so it's highly unlikely they used the BW-starved ICH lanes when you hve a low-latency northbridge host.

Also, 12 lanes of PCIE 2.0 to match sata3, are you on crack? , a SINGLE lane of PCIE 2.0 is 90% of SATA3.
for refresher, per-lane:
PCIE 1.0: 250MBPS
PCIe 2.0: 500MBPS
PCIe 3.0: 1GBPS

so for FULL SATA 3 you need only TWO lanes of PCIe 2.0

[Monkeh]

SATA 3 is decently quick but the best method is still SATA 3 because PCI-E 2.0 takes 12 lanes to match SATA 3
And checking the ICH10 southbridge it reveals that it only has 4 configurable lanes of PCI-E v1.1
and that the Q45 northbridge only has PCI-E v1.1 16 lanes that cannot be configured
But there's 6 sata 2 ports so i doubt that is PCI-E

whaaaa??
first of all, the 16 lanes in the nortbridge are configurable and usable as you want and wish(and i've done it personally), you can plug whatever you want in whatever width you want in those lanes, so it's highly unlikely they used the BW-starved ICH lanes when you hve a low-latency northbridge host.

Also, 12 lanes of PCIE 2.0 to match sata3, are you on crack? , a SINGLE lane of PCIE 2.0 is 90% of SATA3.
for refresher, per-lane:
PCIE 1.0: 250MBPS
PCIe 2.0: 500MBPS
PCIe 3.0: 1GBPS

so for FULL SATA 3 you need only TWO lanes of PCIe 2.0

T4P smokes some strong stuff.

And he needs to stop changing his name!

[T4P]

SATA 3 is decently quick but the best method is still SATA 3 because PCI-E 2.0 takes 12 lanes to match SATA 3
And checking the ICH10 southbridge it reveals that it only has 4 configurable lanes of PCI-E v1.1
and that the Q45 northbridge only has PCI-E v1.1 16 lanes that cannot be configured
But there's 6 sata 2 ports so i doubt that is PCI-E

whaaaa??
first of all, the 16 lanes in the nortbridge are configurable and usable as you want and wish(and i've done it personally), you can plug whatever you want in whatever width you want in those lanes, so it's highly unlikely they used the BW-starved ICH lanes when you hve a low-latency northbridge host.

Also, 12 lanes of PCIE 2.0 to match sata3, are you on crack? , a SINGLE lane of PCIE 2.0 is 90% of SATA3.
for refresher, per-lane:
PCIE 1.0: 250MBPS
PCIe 2.0: 500MBPS
PCIe 3.0: 1GBPS

so for FULL SATA 3 you need only TWO lanes of PCIe 2.0

HELLO. SATA 3 is 6GBPS.
I know the PCI-E x4 is from the southbridge that means the PCI-E x16 is used for the GPU itself and it can only be used if the GPU is disabled
but you can't have more then one device on the x16 and that's the Q45's limit unlike the southbridge's x4 which can be reconfigured for 4x1 but that's not the case since physically the x4 is there for an upgrade for a high-speed offloading module from Agilent
which definitely points to a SATA 2

[Monkeh]

SATA 3 is decently quick but the best method is still SATA 3 because PCI-E 2.0 takes 12 lanes to match SATA 3
And checking the ICH10 southbridge it reveals that it only has 4 configurable lanes of PCI-E v1.1
and that the Q45 northbridge only has PCI-E v1.1 16 lanes that cannot be configured
But there's 6 sata 2 ports so i doubt that is PCI-E

whaaaa??
first of all, the 16 lanes in the nortbridge are configurable and usable as you want and wish(and i've done it personally), you can plug whatever you want in whatever width you want in those lanes, so it's highly unlikely they used the BW-starved ICH lanes when you hve a low-latency northbridge host.

Also, 12 lanes of PCIE 2.0 to match sata3, are you on crack? , a SINGLE lane of PCIE 2.0 is 90% of SATA3.
for refresher, per-lane:
PCIE 1.0: 250MBPS
PCIe 2.0: 500MBPS
PCIe 3.0: 1GBPS

so for FULL SATA 3 you need only TWO lanes of PCIe 2.0

HELLO. SATA 3 is 6GBPS.
I know the PCI-E x4 is from the southbridge that means the PCI-E x16 is used for the GPU itself and it can only be used if the GPU is disabled
but you can't have more then one device on the x16 and that's the Q45's limit unlike the southbridge's x4 which can be reconfigured for 4x1 but that's not the case since physically the x4 is there for an upgrade for a high-speed offloading module from Agilent
which definitely points to a SATA 2

6Gbps. Not 6GBps.

You read the ICH10 datasheet very, very wrong. It has SIX lanes, configurable as 6 x1 or 1 x4 + 2 x1.

There is no way in hell they're using SATA for this. They'd have to be utterly insane to do so. Please think before opening your mouth.

[Eliminateur]

HELLO. SATA 3 is 6GBPS.
I know the PCI-E x4 is from the southbridge that means the PCI-E x16 is used for the GPU itself and it can only be used if the GPU is disabled
but you can't have more then one device on the x16 and that's the Q45's limit unlike the southbridge's x4 which can be reconfigured for 4x1 but that's not the case since physically the x4 is there for an upgrade for a high-speed offloading module from Agilent
which definitely points to a SATA 2

As monkeh pointed, you made an order of magnitude error in your units for SATA, SATA3 is 600MBPS (that is, MEGABYTES)

Also, you're wrong on the limit, the pcie lanes from the root complex have NOITHING to do with the GPU, the internal GPU is disabled ONLY if you attach another GPU to the system(that is ANY GPU IN ANY BUS, if you put a pci vga, it will disable itself) and that's a limitation of the GPU.
the lanes are normal pcie lanes which can be used REGARDLESS of the internal GPU.
And as i've said before: i've tested that myself

i.e.: grab any normal PC with integrated graphics, plug a pciex1 device(usb adapter, soundcard, sata controller) into the pciex16 slot and MAGIC, it works!

[T4P]

The x16 is not spread out in this case but you still don't get what i mean
The x16 is not reconfigurable, of course electrically it works but you are like wasting 15 lanes because that isn't configurable
Unlike the x4 on the ICH10 that can be randomly shuffled between 4x1 and 1x4

600MBPS = 8GT/s
Alright! I stand corrected.
It still takes 2 lanes and that is definitely from the SATA
How else do you think what sort of magic Agilent did to make the x4 slot from the southbridge work together with another 4 lanes?
There's only 4 lanes from the ICH10

[Short Circuit]

And PCI-express it is; 'therory of operation', servicemanual page 175/176;

The backplane board is essentially a device on the PCI-Express bus connected by two SATA
cables to the motherboard.

[Monkeh]

The x16 is not spread out in this case but you still don't get what i mean
The x16 is not reconfigurable, of course electrically it works but you are like wasting 15 lanes because that isn't configurable
Unlike the x4 on the ICH10 that can be randomly shuffled between 4x1 and 1x4

600MBPS = 8GT/s and PCI-E is rated in GT/s!

Please stop arguing numbers you don't understand. Real PCI-E 2.0 throughput is 500MB/s per pair.

The ICH10, once again, has six lanes, not four.

And, I quote from the 4 series datasheet:

x1 width support simultaneously with the sDVO functionality which is
multiplexed onto the PEG port. Such shared use facilitates ADD2+/MEC
implementation.

Which, in plain English, means you can use the x16 slot without onboard graphics, or the first lane with onboard graphics.

And, as Short Circuit has just kindly dug out of the service manual, it is indeed using a PCI-E bus from the motherboard to the FPGA on the scope side. Thank you, you've been remarkably learning-resistant, good night.

[Short Circuit]

Another nice image from the SM:

[Monkeh]

Another nice image from the SM:

Well would you look at that, it works exactly the way I thought it did.

[Eliminateur]

so the trigger FPGA might be that naked virtex4, what kind of MONSTER FPGA could be the main?, a Stratix V or IV?
then again the V might be too new for this design(it's 28nm and they're using a s775 motherboard from the 45nm era...)

i wonder how they arranged the pcie lanes considering there's only a x1 lane on the northbridge.... and you can't combine it with the other root complex on the southbridge(which has it's lanes used by the pcie x4 slot).
UNLESS that x1 limitation doesn't applies "per se" and they used it fully from the NB...

[Monkeh]

so the trigger FPGA might be that naked virtex4, what kind of MONSTER FPGA could be the main?, a Stratix V or IV?
then again the V might be too new for this design(it's 28nm and they're using a s775 motherboard from the 45nm era...)

i wonder how they arranged the pcie lanes considering there's only a x1 lane on the northbridge.... and you can't combine it with the other root complex on the southbridge(which has it's lanes used by the pcie x4 slot).
UNLESS that x1 limitation doesn't applies "per se" and they used it fully from the NB...

They're only using one lane. It could be one of the SB lanes (it has SIX, not FOUR!), but if I were them I'd be using the NB PCI-E 2.0 lane. They'll need a clock signal as well, which runs them down to three pairs. That's one lane and change. They may actually be using the extra pair for presence signals.

[EEVblog]

With this massive fans I was expecting a fair amount of dust inside. Dave, did you had it cleaned?

No cleaning.

Dave.

[EEVblog]

Nice find in the service manual!
I wonder what "Hedwig" is on the acquisition board? An internal code name for a custom chip?

Dave.

[Eliminateur]

Nice find in the service manual!
I wonder what "Hedwig" is on the acquisition board? An internal code name for a custom chip?

Dave.

As it stands in the schematic, looks like it might be the mem controller, some serious Harry Potter(HP, he-he-he) fans there

Monkeh, hmm letsee, we have 4 wires down each SATA cable and a x1 link needs... 2 pairs for data, one pair for clock, yup, there it is, the two cables i had forgotten completely about clock pair.
there's not enough pairs left for anything else(highly doubt the're running the i2c pair, probably ground for spacing)

[Short Circuit]

...(highly doubt the're running the i2c pair, probably ground for spacing)

Actually, what about SMBus (slowish I2C) to access all those fan controllers on the backplane board,
and a bunch of voltage and temperature monitors probably?
Of course can be done from the PCI express as well, but having some monitoring fairly independent
from the really expensive bits&pieces sounds like a good idea...

[Monkeh]

Monkeh, hmm letsee, we have 4 wires down each SATA cable and a x1 link needs... 2 pairs for data, one pair for clock, yup, there it is, the two cables i had forgotten completely about clock pair.
there's not enough pairs left for anything else(highly doubt the're running the i2c pair, probably ground for spacing)

They may be using the remaining pair for card presence. I'm not familiar enough with PCI-E to know if they can get away without it.

As Short Circuit just suggested, the block diagram shows fan control. It could be on that spare pair, actually. There aren't any other connectors going that I recall.

[DarkPrince]

Thanks Dave for the wonderful view of the insides. Very nice!

Ironically yesterday there was a showcase from Agilent at my work place... guess what was there! Two wonderful Infiniium 9000 series scopes. One lower range (3 Gsps? and one over 30Gsps). Awesome to see them in person. Of course they were demonstrating the eye diagram when I arrived. 

[amspire]

Nice find in the service manual!
I wonder what "Hedwig" is on the acquisition board? An internal code name for a custom chip?

Dave.

It looks like Agilent have started giving names to modules, so that the memory controller is called Hedwig and the timebase IC is Wahoo, and the preamplifier is Oak.

The names could come from locations near the Agilent factory. If they are near Atlanta, then the Wahoo valley has an Oak harbour, and nearby there is a town of Hedwig.

I have no idea where the Agilent 90,000 design team are actually located but Agilent do seem to offer jobs in Atlanta.

Richard.

[NiHaoMike]

The build quality looks great as expected, but the failure rate is unexpectedly high from what I've seen at work. Not even the HP computers in the lab have that sort of failure rate.

[amspire]

The build quality looks great as expected, but the failure rate is unexpectedly high from what I've seen at work. Not even the HP computers in the lab have that sort of failure rate.

You would be very brave to buy a scope like this without a service contract. This is not a mass produced item, so there will definitely be bugs and design errors.

[Eliminateur]

...(highly doubt the're running the i2c pair, probably ground for spacing)

Actually, what about SMBus (slowish I2C) to access all those fan controllers on the backplane board,
and a bunch of voltage and temperature monitors probably?
Of course can be done from the PCI express as well, but having some monitoring fairly independent
from the really expensive bits&pieces sounds like a good idea...

hmmm IIRC in the video, i didn't see a tach wire on those Delta fans.
But in the block diagram and schematic i don't see anything that indicates smbus conection, that dotted line from the fans to b4 intrigues me, it could be the fan tachos (or at least the upper smaller fan) connected to the LPC controller on the motherboard.
I wonder which cpu are they using, maybe a C2Q something along the lines of a E6600 or 9xxx series for brute power?

[T4P]

C2Q and 9000 i doubt, this scope was manufactured recently and the C2Q and the 9000 QCs have gone EOL a long time ago
The only 775 parts last produced are the Pentium Dual Cores (They aren't half bad, quite fast actually but it loses to a A10-4600M < A Laptop Processor! Still...)
The E6600 is EOL too along with the E6200
the only ones in the wild west is E5400/E5700/E6700
Plus i doubt Intel will continue using their 45nm process so yeah i guess Agilent will need a new mainboard although they might have 100's of C2Q left
The last time the 9000's came out of the wild was 4 years ago

[AntiProtonBoy]

Those hybrid modules gave me hard-on. I love exotic electronics.

[firewalker]

Those hybrids would look great on an transparent acrylic box, with laser etched 13 GHz. As a decorative for the desk.

Alexander.

[Eliminateur]

you reminded me of a keychain i had years ago from IBM that had an actual powerpc core inside embedded into the acrylic, it was damn awesome and those 13Ghz hybrids are the perfect size for that

[firewalker]

I have a keychain of the super conductor used inside the LHC.  An some DIY eproms.



Alexander.

[Dread]

To be honest I was really looking forward to a full Teardown.  This was a little like going on a date and getting stopped before you can get your willie wet.

[SeanB]

At the list price Dave probably was suffering some dysfunction at the slight possibility of it not working, even if it was not his fault. Definitely a small moment time.

[EEVblog]

To be honest I was really looking forward to a full Teardown.

Well, they were kind enough to loan it to me, and asked me not to tear it down, so I did the best I could :->

Dave.

[Toddd]

If I'd had been lent that device, I'd be worried about turning the thing on and zapping it with a power surge, I definitely would not be removing any part of the case. In fact, I'd expect them to thread lock the screws. The last scope I borrowed had green gunk over the screws and a 'Warranty void if broken' sticker!

So congrats for going as far as you did!

[Anquietas]

Those hybrid modules gave me hard-on. I love exotic electronics.

Does anyone know if there are publicly available research papers on the operation of these front end MCMs (or similar technology)? I would really like to see this, even if it's a decade or so too early for me.