It would be, though a design like this is still dominated by the size and thru-hole shape of the DIPs used.
An SMT build isn't much better, because you still have via rings on the back side.
In both cases, VCC will be chopped up by inevitable too-good-to-miss-out-on routes, between adjacent and nearby pins.
For DIP, pour around all pins is quite feasible, but hard to maintain for SOIC (plus a via per pin, on average, more or less), and impossible for TSSOP or smaller. So the rows of pads in the latter case will cause a void in the VCC pour.
Consequently, you'll want to space things out somewhat more than you would even for a 2-layer build (with no particular attention to EMC, that is), which means you aren't saving any size going to four layers here. So, your motivation is now, just to say you could, more than anything.
The best you could do, is to opt for blind vias ($$). Then you could build top side components and VCC on top layer, drop vias to Mid1 for priority routes, then route intersections and low priority routes on Mid2+. Ground vias are regular thru vias or pads. This would give you 100% solid bottom ground (except for vias), which is excellent shielding for frequencies well above the skin depth of that copper thickness (so, for 2oz, some MHz).
One possible advantage of this kind of construction: the majority of traces/routes are fully encapsulated, making corrosion a somewhat lower risk. Vias, pads and connecting traces are still vulnerable; vias can be plugged/capped (for another dollarsign more; we're already not caring about fab cost, so what the hey
), and we can do double layer of soldermask, or fill silk everywhere*. Or both, why not. And obviously, there's always the boring answer, conformal coating.
*Oh that's something I should try some day, do an inverted silk board. Text can be drawn with inverted labels, and the negative space inbetween can be filled without too much futzing (possibly a polygon can fill it, but I kind of doubt that Altium at least calculates poly clearances that way, on non-copper layers that is, hmm).
Tim
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