Author Topic: EEVblog #436 - Saleae USB Logic Analyser Review & Teardown  (Read 63019 times)

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Offline ben_r_

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Re: EEVblog #436 - Saleae USB Logic Analyser Review & Teardown
« Reply #100 on: April 01, 2013, 07:36:33 pm »
Ha Dave done a review on the Logic16 by chance? Not that there will be much difference since its using the same software but I was just curious as I didnt find one doing a quick search.

On a different note, I cant believe their current Beta has been in Beta since August 30th of 2012!
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Offline lduck

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Re: EEVblog #436 - Saleae USB Logic Analyser Review & Teardown
« Reply #101 on: April 05, 2013, 12:26:35 am »
Anyone have experience with the logic sniffer from dangerous prototypes?

Much more limited memory but way faster (200MSPS if on 16ch) with more channel count (32 if you get the 2nd buffer board). I tend to use both, the Saleae for protocol and OBLS for multi channel timing data.

Disagree on free_electron's comment that MSO's built in LA are better, the one's I tested (Agilent 3000x) can only trigger on a single byte pattern. So if you want steady trigger on 'e' in a UART stream with "eee" you are shit out of luck, I got an mbed with a simple script to send a trigger pulse on a "sentence". Navigating the captured data is also worse than dedicated LA's. A scope interface simply isn't meant for such things.

I bought fpga board from dangerous prototypes and use that as LA. It should be easy even if you never hear of fpga before. If i remember right, they have video tutorial to help you with that. I bought  that board mostly because I wanted FPGA board and used it as LA just few times (JTAG, 1-wire, random generator) and it did the work. It does not have functions as some LA that I can use in school. but if you need just basics and you are beginner,  that could be also a plus. I have always troubles and needs some time to find out how to measure what I want on those profi LA as I use them just  occasionally.

Offline sakujo7

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Re: EEVblog #436 - Saleae USB Logic Analyser Review & Teardown
« Reply #102 on: April 20, 2014, 04:38:25 am »
Dave, when you did the test with UART serial, you were using a inverted bit setting.

Yep. TTL serial is conventionally active low! Trap for young players there... Zoom in at various points (eg. 32:30) and you can see it treating the first low after a high as the start bit and then sampling after that. It then marks the spot after the last bit in red because the stop bit is missing!

Personally I think the lack of advanced triggering isn't that big of a deal because of the massive sample memory and excellent export capabilities.

I'd agree with that, but you really need a search function to seal the deal. "Record for ages" + "Search for interesting bits" and you can drop the old "I better set up my trigger right and wait..." mindset for good.

Offline amyk

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Re: EEVblog #436 - Saleae USB Logic Analyser Review & Teardown
« Reply #103 on: May 14, 2014, 01:08:31 pm »
Yes, an ATA bridge is even mentioned as one of the applications in the datasheet. Very versatile chip - there's other converters that can be made with it:

USB-ATA boards:

USB-parallel converter:

USB-serial converter: (Chinese)

But, just because the FX2 can be used to implement a lot of things doesn't necessarily mean you'll find an FX2 in that converter (especially one so cheap).

SATA is too fast for the FX2.

Offline JustSquareEnough

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Re: EEVblog #436 - Saleae USB Logic Analyser Review & Teardown
« Reply #104 on: March 14, 2017, 09:33:26 pm »
Curious if any one has used the software recently it appears the trigger functionality is the same as it was during the review but search was added to decoded protocols.

Also thinking about using it with sigrok, anyone else tried and agree?


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