Author Topic: EEVblog #471 - Overload Detector Circuit Design  (Read 15455 times)

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nitro2k01

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EEVblog #471 - Overload Detector Circuit Design
« on: May 18, 2013, 05:17:29 am »

Once again, a good balance, I think. As long as you make a practical circuit, you can't go wrong.
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Deagle

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #1 on: May 18, 2013, 10:43:33 am »
Agreed, as long as Dave doesn't stop making the practical circuit. For a student like myself, the theoretical and the practical results dont always match up . So I like how he puts the circuit together and explains other aspects that could mess it up.

On this one in particular, I really enjoy putting together these kinds of circuits where you have to add integrators, comparators, Schmitt triggers, RC etc and once you finish you end up with a pretty cool looking circuit ( I originally found these sorts of circuits pretty daunting when I started off).

Thanks Dave! I'll look forward to next week

SeanB

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #2 on: May 18, 2013, 12:27:30 pm »
Very good, and a good demonstration of the differences between the data sheet, the simulation and what it does with real components in a real circuit.

hlavac

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #3 on: May 18, 2013, 02:00:26 pm »
It would be probably easier to fix the input common voltage asymmetry by tying the bottom of the input voltage divider to -1.75V instead of ground, and fixing the threshold voltage dividers to account for that. That would shift the input voltages window down to the center of the allowed input voltage range of -2.5V .. + 1V.
« Last Edit: May 18, 2013, 02:13:32 pm by hlavac »
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SeanB

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #4 on: May 18, 2013, 02:17:32 pm »
Would work, you level shift to avoid the common mode voltage limits, working around the limitations of the real components. With setting the limit voltages you can save 2 components by using the limit voltage setting resistors as the 2 resistors used to make your mid rail common reference voltage. 2 resistors less to place and lower power use slightly.

Pascalken

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #5 on: May 18, 2013, 03:32:48 pm »
Hi,

I think that if your input divider would be connected to the negative supply voltage (instead of being connected to the ground) that the resulting voltage shift might be within the input range of the comparator, depending on the division ratio.

Pascal

tbscope

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #6 on: May 18, 2013, 04:15:46 pm »
At the very end of the video, Dave uses an oscilloscope to view the charging of the capacitor. He mentions you can't measure the timing constant correctly because you change the circuit while you measure it.

Is it possible to correctly measure the timing constant? Can you use a buffer between the RC circuit and the probe?

hlavac

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #7 on: May 18, 2013, 04:50:15 pm »
Sure, if it exactly matches what will be connected there normally...
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c4757p

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #8 on: May 18, 2013, 05:08:52 pm »
Is it possible to correctly measure the timing constant?

It's a time constant... just measure the time! If it's turning an LED on probe the LED.
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Alana

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #9 on: May 18, 2013, 05:58:35 pm »
Art of electronics by Dave! Keep it up, such simple topics were missing for quite some time and i'm glad its back.

free_electron

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #10 on: May 18, 2013, 06:50:30 pm »
my approach would have been different : active rectifier followed by a single comparator.

the advantage of the active rectifier is that the triggerpoint will be symmetrical around the reference point.
and i dont need a negative rail either...
there is only 1 comparator doing the work.

hows this work ?
well, during the positive half of the period:
ic1 a output will follow input ( he's basically a unity gain buffer )
ic1b output sees the signal from ic1a and the input signal. that thing is set up for a gain of 2 (r2=r3). so it subtracts VO from 2xVin yielding 1xVin.

during the negative half of the period:
ic1a locks up ( it cant measure below ground ... since it has no 'negative supply) so V0 becomes effectively ground.
IC2 a will produce a voltage to make its - input also be '0'. if vin is -1 volt vout will be +1 volt. since r2=r3 the system is in balance. so for negative signals this thing runs basically unity gain for positive signals it runs a gain of 2 but subtracts 1 vin yielding again the net effect of unity gain.

there you go. an ideal rectifier with only 1 power rail.  slap on a comparator and you are good.

r1 is needed so you dont fry the esd diode in ic1 when you pull the input below ground.

in case you have a DC offset at the input : add a coupling capacitor.
« Last Edit: May 18, 2013, 07:04:33 pm by free_electron »
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nitro2k01

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #11 on: May 18, 2013, 08:48:04 pm »
free_electron, is really a good idea to rely on feeding the opamp voltages outside the rails as part of normal operation? I'm thinking about things like phase reversal in some opamps, or CMOS latchup. I'd be wary of the absolute maximum ratings in the datasheet, which often specify something like V- or V- - 0.3V as the negative limit for the inputs...
« Last Edit: May 18, 2013, 08:50:01 pm by nitro2k01 »
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c4757p

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #12 on: May 18, 2013, 08:55:01 pm »
something like V- or V- - 0.3V as the negative limit for the inputs...

With current flowing into the ESD protection diodes it won't exceed that. Just make sure to respect the maximum diode current.
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nitro2k01

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #13 on: May 18, 2013, 09:23:04 pm »
Well, sure. Unless you somehow stumble across an opamp that doesn't have ESD protection. Should be rare to non-existent these days, but still. Looking at the datasheet for good ol' LMx24, this is documented and specified behavior, so fair enough. But just saying that this is a potential trap, and maybe something you should be aware of. As always, know what you're doing, and read the datasheet.
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jancumps

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #14 on: May 18, 2013, 09:47:49 pm »
my approach would have been different : active rectifier followed by a single comparator.

....

Tried building this circuit with 3 x 100K resistors. I'll have to recheck, because the output after opamp2 doesnâ€™t give the expected results...
negative cycle is 3 times the positive.

JackOfVA

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #15 on: May 18, 2013, 11:30:40 pm »
Got the two op-amp rectifier circuit to run in LTspice, with 100K resistors.

However, in trying to make the circuit simulate, it was apparent that you have to use rail-to-rail op-amps. When tried with jelly bean LF-411 parts, it failed to work anything like claimed. Plots 01 & 02 are with LT1498 op-amps.

Also tried a simulation with a 45 MHz, 45V/us slew rate LT-1632 LTC rail-to-rail amp and found the output followed the rectified envelope, but it had a high frequency oscillation (plot _03 & 04). 04 is a zoomed in view of the envelope and shows an oscillation around 1.2 MHz.

LT1498 is a rail-to-rail 10 MHz, 6 v/us slew rate part and it simulates as claimed.

If this simulation is anywhere close to the real world, it's an unstable design.

tom66

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #16 on: May 18, 2013, 11:40:57 pm »
The comparator circuit IMO is the "right" way to solve the problem. Adding an active rectifier introduces lots of limitations.

One of the main problems that circuit has is the follower op-amp has to constantly recover from saturation, limiting high frequency response, so suddenly, your references are not the same on both rails...

However, I would have liked to see Dave use a three-resistor string with the various references tied off that -- he could have even derived the set point for the RC comparator from a fourth resistor.  For the three resistor string, the mid resistor could be 220k, giving nearly the same result as 100k each side to ground, and also allowing you to change the amplitude span with a single resistor.

Rufus

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #17 on: May 18, 2013, 11:53:20 pm »
Well, sure. Unless you somehow stumble across an opamp that doesn't have ESD protection. Should be rare to non-existent these days, but still. Looking at the datasheet for good ol' LMx24, this is documented and specified behavior, so fair enough.

Is it? I looked at 3 LM324 datasheets. Only one specified an abs max input current for -ve voltages. That one also helpfully noted

"thereby acting as input diodes clamps. In addition to this diode action, there is also NPN parasitic action on the IC chip. this transistor action can cause the output voltages of the Op-amps to go to the VCC voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative."

So pull current out of an input and all op-amps in the package might output one rail or the other.

I expect you can find more datasheets with abs max current ratings, I would be surprised if you find one that provides any specifications for operation with current being drawn through the clamps.

The op-amp also needs to recover from gross overdrive in less than the rise/fall (to clip limit) of the input signal. The op-amp common mode range still has to include the signal +ve peaks and output range has to include ground (which rules out the LM324). The input impedance is low and asymetric. The clipping is only as symmetrical as the matching of the two resistors on the second amp.

So a generally shitty circuit with lots of provisos uses two op-amps, a comparator and some resistors to replace two comparators and some resistors - way to go.

free_electron

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #18 on: May 19, 2013, 04:15:46 pm »
lm324...  can we use something a bit more modern like an OPA2374 ?

Besides , don't shoot me. That circuit's been around for a while and works perfectly fine with a modern rail-to-rail  opamp (that does not exhibit the phase reversal problem. most modern opamps have solved that one)
The advantage is that you can inject GAIN in that system. great to rectify very low level signals.

Below is another version

or you can always fall back on the opamp rectifier with diodes : just google for active rectifier or opamp rectifier.

The problem with using 2 comparators is that you will run into assymetry of the input stages like dave showed. Rectifying the signal first solves that problem.

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Rufus

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #19 on: May 19, 2013, 06:06:54 pm »
lm324...  can we use something a bit more modern like an OPA2374 ?

Digikey's cheapest OPA2374 is 9 times more expensive than their cheapest LM339.

The problem with using 2 comparators is that you will run into assymetry of the input stages like dave showed. Rectifying the signal first solves that problem.

A rectifier where +ve and -ve gain match depends on resistor matching is no better than comparators with switching thresholds depending on resistor matching.

lewis

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #20 on: May 19, 2013, 06:35:50 pm »
Good demo....

This top comparator (see image) is the wrong way round though (swap the inputs) - it doesn't need to be an inverter because it's driving the LED cathode.

Some readers may be keen to apply this technique to audio power amplifiers, but the voltages involved are invariably too high. Also, it's good to take into account supply variation and ripple which the fixed reference circuit can't do. Here's a good circuit for this application: http://sound.westhost.com/project23.htm
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nitro2k01

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #21 on: May 19, 2013, 09:59:10 pm »
Well, sure. Unless you somehow stumble across an opamp that doesn't have ESD protection. Should be rare to non-existent these days, but still. Looking at the datasheet for good ol' LMx24, this is documented and specified behavior, so fair enough.

Is it? I looked at 3 LM324 datasheets. Only one specified an abs max input current for -ve voltages.
You're right. I only checked TI's datasheet.
So a generally shitty circuit with lots of provisos uses two op-amps, a comparator and some resistors to replace two comparators and some resistors - way to go.
That's sort of my sentiment. The circuit could be useful, but the designer needs to be aware of the gotchas. This is not the circuit to teach in peak detection 101. You could also use a MAX232 with a 3.3 V supply and it will work fine on a good day. Then someone connects 15 m RS232 cable and the transmission might be unstable.

And even so the circuit could work ok (with many opamps) with the addition of a diode and maybe a resistor.
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tom66

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #22 on: May 19, 2013, 11:13:58 pm »
The problem with using 2 comparators is that you will run into assymetry of the input stages like dave showed. Rectifying the signal first solves that problem.

Precision resistors and rail-to-rail input comparators solve this, and they are a lot more accurate and dependable.

dtweed

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #23 on: May 21, 2013, 05:42:58 pm »
The real "brain fart" (at 11:25 in the video) is that it doesn't matter whether the end of the capacitor is connected to ground, the negative rail, or even the positive rail! All DC rails in the circuit have the same functionality as far as the capacitor is concerned.

nitro2k01

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #24 on: May 21, 2013, 06:44:59 pm »
The real "brain fart" (at 11:25 in the video) is that it doesn't matter whether the end of the capacitor is connected to ground, the negative rail, or even the positive rail! All DC rails in the circuit have the same functionality as far as the capacitor is concerned.
In theory, yes. In practice, one consideration is the path the current takes when the open collector output is charging vs discharging the cap. If you connect the capacitor to the positive rail, turning on the transistor will create a small current spike through the power supply, capacitor, transistor, ground and back through the power supply. If you connect the capacitor to "ground" as indicated in the video, the current spike will only go between the capacitor and the transistor in the comparator. This may or may not matter depending on how vulnerable the circuit is to power supply noise. Similarly, if you reference a signal from one of the power rails, you also get any spikes in the power rails superimposed onto the signal, because the signal itelf is referenced to ground, and the cap is not.

In this case is no big deal whichever way you do it, and you could argue that if you're having power supply interference, you need more decoupling. But it's useful to this kind of analysis of what's going on.
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Jope

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #25 on: May 22, 2013, 02:11:58 pm »
Regarding free_electrons first post in this thread about the full-wave active rectifier, here's the article I think he copied the picture from: Full-Wave Active Rectifier Requires No Diodes

There's a good application note from ST Microelectronics about comparators: AN4071

Fezder

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Re: EEVblog #471 - Overload Detector Circuit Design
« Reply #26 on: May 26, 2013, 11:00:36 am »
nice, this was JUST what i was after in my project, this was THE missing part of the puzzle! thanks dave .
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