EEVblog #475 - GW Instek GDS-2000A Oscilloscope Teardown

[EEVblog]

Datasheet links:
http://www.ti.com/lit/gpn/adc08d500
http://www.ti.com/lit/gpn/lmh6518
http://www.analog.com/static/imported-files/data_sheets/ADCMP567.pdf
http://www.analog.com/static/imported-files/data_sheets/AD8370.pdf
http://www.analog.com/static/imported-files/data_sheets/AD8009.pdf
http://www.analog.com/static/imported-files/data_sheets/AD8000.pdf
http://www.analog.com/static/imported-files/data_sheets/AD9834.pdf
http://pdf1.alldatasheet.com/datasheet-pdf/view/151684/GSI/GS88036BGT-333I.html

[marmad]

They have to be overclocking the ADCs - otherwise they'd only have 500MSa/s with all 4 channels on. Or is that what it does? I had thought it was 2GSa/1GSa/s per 2 channels.

Edit: I can't actually find details in the specifications about sample rate with 4 channels active. It just says, "1CH: 2GSa/s; 2CH: 1GSa/s" in the manual.

And thanks for the teardown, Dave 

[Hydrawerk]

Probably they overclock the ADC08D500. http://www.ti.com/lit/ds/symlink/adc08d500.pdf
Well, I am not a Rigol DS2000 fan, but DS2000 has definitely a more powerful hardware. (They should come up with a mixed signal scope, too.)
GDS-2000A's crippled intensity gradation is not because of a bad firmware.

[Hydrawerk]

Anyway, what's the custom ADC used in Rigol DS2000?
http://farm9.staticflickr.com/8449/8022102149_eee53ee85d_h.jpg
I expect that it's a real 2×1GSa/s ADC, isn't it?

[marmad]

Dave - the strange stuttering of the display updating that happened during your first video might well support your theory that the display is being driven directly by the AD Blackfin.

[EEVblog]

Anyway, what's the custom ADC used in Rigol DS2000?

It's not custom. I recall someone worked it out based on the pinout, and was likely the same or similar chip.

[EEVblog]

They have to be overclocking the ADCs - otherwise they'd only have 500MSa/s with all 4 channels on. Or is that what it does? I had thought it was 2GSa/1GSa/s per 2 channels.

I cam confirm that it says 1GSPS when all 4 channels are turned on. With only 4 x 500MSPS converters...

[EEVblog]

Dave - the strange stuttering of the display updating that happened during your first video might well support your theory that the display is being driven directly by the AD Blackfin.

That is most likely.

[grego]

Dave - the strange stuttering of the display updating that happened during your first video might well support your theory that the display is being driven directly by the AD Blackfin.

That is most likely.

I've emailed the InstekUSA folks to see if they can get an answer.  If/when I get a reply I'll post it.

[marmad]

It's not custom. I recall someone worked it out based on the pinout, and was likely the same or similar chip.

Branadic (in the DS2000 Teardown thread) claimed the Rigol-rebadged ADC pinouts matched the TI ADC08DL502 - which is similar - and would also be overclocked.

From the TI literature:
Quote: "...Although the ADC08DL502 is tested and its performance is guaranteed with a differential 1 GHz clock, it typically will function well with input clock frequencies indicated in the Converter Electrical Characteristics.... Operation up to the sample rates indicated in the Converter Electrical Characteristics is typically possible if the maximum ambient temperatures indicated are not exceeded. Operating at higher sample rates than indicated for the given ambient temperature may result in reduced device reliability and product lifetime. This is because of the higher power consumption and die temperatures at high sample rates. Important also for reliability is proper thermal management..."

I would assume the ADC08D500 has similar specs - and Instek has heatsinked the ADCs and has the fan blowing almost directly onto them.

[Hydrawerk]

Operating at higher sample rates than indicated for the given ambient temperature may result in reduced device reliability and product lifetime.

I wonder how critical it might be. We see that the ADC is still the most expensive part of a scope... Only in DSOX2000 you get real 2×1GSa/s ADC and thus maybe (?) longer lifetime. But you only get that funny 100kpoints memory... 

[EEVblog]

Only in DSOX2000 you get real 2×1GSa/s ADC and thus maybe (?) longer lifetime. But you only get that funny 100kpoints memory... 

Agilent have the benefit of their own custom ASIC for the both the ADC and the main chip. The benefits of being a huge company like that with an extensive R&D history.
This is why the "big three" (HP/Agilent, Tek, and Lecroy) were the only companies that could offer GSPS class scopes until Rigol came along with their 5000 series and did it with off the shelf chips.
AFAIK, the "big three" are still the only ones that roll their own silicon.

[marmad]

Operating at higher sample rates than indicated for the given ambient temperature may result in reduced device reliability and product lifetime.

I wonder how critical it might be. We see that the ADC is still the most expensive part of a scope...

That's why I'm fairly certain Instek is making sure to operate them within whatever the given temperature is for the higher sample rate. I wouldn't worry about it - DSO makers have been overclocking ADCs for years now - and there doesn't seem to have been massive amounts of ADC failures because of it.

[marmad]

Only in DSOX2000 you get real 2×1GSa/s ADC and thus maybe (?) longer lifetime.

There's no conclusive evidence that this is true. Although Branadic hypothesized that Rigol was using an overclocked TI chip, I suspected instead that Rigol may be using the MXT2001 Chinese ADC that is 2 x 1GSa/s (same one that has been used successfully for the last 2 years in the higher BW Owon SDS models). The fact that Rigol didn't heatsink the ADC would tend to support my theory - although I suppose you might be able to figure it out by simply measuring the heat of the chip while it's running.

[EEVblog]

That's why I'm fairly certain Instek is making sure to operate them within whatever the given temperature is for the higher sample rate. I wouldn't worry about it - DSO makers have been overclocking ADCs for years now - and there doesn't seem to have been massive amounts of ADC failures because of it.

I concur. I'm sure Instek have done their homework on it.

[BravoV]

Saw a coin cell battery in the main board, is that for cal memory backup or just for rtc ?

[tinhead]

They have to be overclocking the ADCs - otherwise they'd only have 500MSa/s with all 4 channels on. Or is that what it does? I had thought it was 2GSa/1GSa/s per 2 channels.

I cam confirm that it says 1GSPS when all 4 channels are turned on. With only 4 x 500MSPS converters...

oh well, what the firmware is showing is one thing, you probably don't have 250MHz+ signal generator to check if the DSO can still sample it properly,
but i'm sure you can build simply source in a minute. Another way is to measure ADC clock in, it must be 1GHz clock when 4ch enabled and they really overclock.
But somehow i don't think so, i think this is firmware bug showing 1GS/s where only 500MS/s are availabe, if they were overclokcing, why they not used then
"2GS/s on 2 channels and 4GS/s on one channel" announcement? Nobody would overclock only for 4ch mode, but even if (i would really wonder) than without
announcement must be higly unstable and they hoping that users not using 4ch that often? No, not Instek. So i would say, bug in what firmware is diplaying.

[tinhead]

Well, I am not a Rigol DS2000 fan, but DS2000 has definitely a more powerful hardware. (They should come up with a mixed signal scope, too.)
GDS-2000A's crippled intensity gradation is not because of a bad firmware.

crippled can be only something when there could be not crippled as well. But there is no international standard how deep intensity gradation need to be.

One can use properly implemented 16 steps (like VPO color grading), other bad implemented up to 256 steps (Rigol missing color grading).
It is always point of view, so being more specific when describing things could be more accurate.

[tinhead]

Branadic (in the DS2000 Teardown thread) claimed the Rigol-rebadged ADC pinouts matched the TI ADC08DL502 - which is similar - and would also be overclocked.

There's no conclusive evidence that this is true. Although Branadic hypothesized that Rigol was using an overclocked TI chip,
I suspected instead that Rigol may be using the MXT2001 Chinese ADC that is 2 x 1GSa/s

and you right, what Branadic didn't saw is the missing mux unit in ADC08DL502. I do have here ADC08D502 (which is nothing else than not-low power version),
there is as well no mux inside. I've tested by using is as it would be ADC08D500, but no chance, i don't got expected results.

Btw, you can overclock these ADCs, no big deal, but i haven't managed to get that high as they would req. in Rigol DS2k.

From the TI literature:

TI did simply copy/paste without chaning important things in the datasheet. This is actually why i ordered ADC08D502 and tried to enable mux,
in the datasheet the part of specs is still there, so i thought "ohh, maybe it is there".

(same one that has been used successfully for the last 2 years in the higher BW Owon SDS models).

not anymore, they using now "original" ADCs from AD, probably Rigol bought so many that Owon didn't had any chance as to change supplier.

[sg-o]

I think the g13 #119 is? a LM119 High Speed Dual Comparator. But thats only a guess.

[EEVblog]

Saw a coin cell battery in the main board, is that for cal memory backup or just for rtc ?

Presumably just RTC. No one does volatile cal values any more.

[tinhead]

I think the g13 #119 is? a LM119 High Speed Dual Comparator. But thats only a guess.

giving the fact that on the other side of the cable MC10H125 has been used (with diff ECL signals) and no channel offset circuit available
in LA module (but in the POD) i would say they are ECL comparators like ADCMP580 (which have G12 branding btw.), however dual channel version.

[EEVblog]

giving the fact that on the other side of the cable MC10H125 has been used (with diff ECL signals) and no channel offset circuit available
in LA module (but in the POD) i would say they are ECL comparators like ADCMP580 (which have G12 branding btw.), however dual channel version.

Here is the LA module:


The input go to MECL-TTL translators: http://www.onsemi.com/pub_link/Collateral/MC10H125-D.PDF

So no other circuitry in the module to do programmable threshold. So it must be in those head chips.

[MysteryBunny]

This is a bit long, but these are my thoughts on the FPGA and MCU choice:

Blackfin always gets picked because of high MMAC which is like 400-2000 cycles ( other MCU's don't have it @ 400-600mhz which is the sweet spot... Upper end for ARM MCU is around 500-1ghz. People rarely buy above 1GHZ, and often stay at around 400-700mhz... These are cheaper than TI's sitara line, also doesn't have the multiply-accumulate blocks, so Blackfin is #1 )... Also almost all these low end MCUs have video controllers, most designers do not use them because it's more power draw/disruption/routing ( I'm not going to lie. I agree that you can be one sided and say it's laughable @ 700mW-1W range of MCU. Mostly because this isn't battery-powered )...

Altera FPGA w/ 30K LUT 4/6 ( cyclone), which is above average and more expensive than buying a popular FPGA ( sign of a mistake) $25-50 depending on volume. ( vs $10-25 for 10-22k -> most common cyclone IV ) You'd need a spartan 45LXT to outdo that, which is getting to be pricey/specialized... They must've wanted the gate count badly ( Don't they use LX 25s in rigol scopes? I see it in everything, it's SOO cheap )... The crutch is they can pass DSP between the blackfin and the cyclone IV-E... Cyclone usually has better dsp ( more hard IP for it ) than spartan, but the mid-range on xilinx FPGAs is the winner (ie. Artix or better)... Expensive enough to be near SoC-type FPGA price range. Altera boasts so much about systems integration ( the newer series than this has an SoC line with hard-IP dualcore A9 MCUs, so you can tell what altera wants to sell to it's customers )

The one thing I felt weird about was how many filter caps are in that PSU... That molex isn't even the choice one from their catalog. It must be hard to balance ( Analog devices has a video on why you should keep the power planes as close as possible to the A/D)... I think you should really have the A/D and the FPGA near the front end, and then the MCU behind that, especially because an MCU can't handle multiplexing...

Everything seems confused and vaguely artsy, which attempting an art piece is foolish... The front of it is so stupid looking. It's not really ugly, it's just poorly thought-out and rushed... A lot of those knobs/buttons don't need to be there... In the end the design was rushed with the cheap MAX II Z here which is actually SRAM cell FPGA with flash hiding as a CPLD...( Think of lattice semiconductor FPGAs, or an atmel )... DDS is not the first choice compared to a true synth ( DDS is also hated for high-speed microwave signals too. It's a bad choice beyond 2GHZ ), but I guess it's fine as long as you have proper amplification/filtering...

We aren't in the 1990s, but ALSO I can't say that so fast because... The pin capacitance from using those HUGE and stupid PCB headers on the function-gen probably means none of this stuff winning speed and bandwidth records... I've seen sockets like that where you can do that, but that's for PCI-X and you need at least four 2.x-3.x pericom switches in an array just to deal with all the channels ( Around $7 a switch )... This looks like it doesn't even matter to them LOL...

[marmad]

Nobody would overclock only for 4ch mode, but even if (i would really wonder) than without announcement must be higly unstable and they hoping that users not using 4ch that often? No, not Instek. So i would say, bug in what firmware is diplaying.

Why would you think they're only overclocking in 4ch mode? They make 2 and 4 channel versions of the scope - the two groups of channels are separate from each other (they each have their own bank of 2M memory which is not shared).  I would assume that one of the ADC spots is unpopulated in the 4ch version (spend an extra ~$125 in BOM costs for an ADC on an $800 DSO which is not needed?). The fact that the ADCs are heatsinked and that the fan is installed to blow directly on to them makes me think it's more likely that they are overclocked than that there's a bug in the firmware. According to the specs, these ADCs should do 1GSa/s as long as there is correct thermal management.