Author Topic: EEVblog #496 - What Is An FPGA?  (Read 59198 times)

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Offline c4757p

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Re: EEVblog #496 - What Is An FPGA?
« Reply #50 on: July 20, 2013, 08:03:09 pm »
ISE is a flaming pile of bug ridden crap, an amalgamation of separate software absorbed into the parent company over the past 10 years held together with duct tape. Even Xilinx reps admit it sucks.

Amen! I thought I hated working with FPGAs when we started working with Xilinx ones in school, but I'm using a Cyclone in a current project and the whole toolkit is a joy to work with.
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Offline FrankBuss

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Re: EEVblog #496 - What Is An FPGA?
« Reply #51 on: July 20, 2013, 08:18:30 pm »
Nice video Dave. Softcore CPU I think for a FPGA defeats the purpose of FPGA use.  What I understand (in real world terms) is that the FPGA is like a programmable DSP where you can process input signals with many operations all in parallel or due time before the signal changes, but a softcore CPU does things in sequence so one could (as many do) simply use an external ARM CPU with the FPGA.
The power comes from the combination of FPGAs and CPUs. In a complex system usually you have something like slow user input, controller logic, USB connection etc. Implementing this in a HDL is a waste of FPGA logic elements, because even for a simple USB device module you would need maybe a FPGA which costs $40 instead of $20 for the rest of your project, so just add an external $3 microcontroller with hardware USB and you are done.

For scanning slow user input and controlling the system, a soft core might be good for the same reason. Implementing all in a HDL means that you need logic elements for each function you want to implement, and all functions are available in parallel, driven by state machines, because there is no partial reconfiguration of the FPGA (at least not for the cheaper parts). Using a simple soft core like NIOS saves lots of logic elements. Then a NIOS program can configure the functions you've implemented in the FPGA. For example you could implement a VGA generator and a multichannel audio mixer (I've done both, AES3 as audio input/output, up to 192 kHz, 128 channels in parallel) in the FPGA, and a NIOS program implements the drawing functions in the framebuffer, reads the keys or a mouse and configures the routing matrix and mixing coefficients.
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Offline marshallh

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Re: EEVblog #496 - What Is An FPGA?
« Reply #52 on: July 20, 2013, 08:21:51 pm »
Here are some tips I wrote for some guys working with me on a project. Some of it is specific to Verilog, some is general synchronous logic consideration.

http://retroactive.be/verilog_tips.pdf
Verilog tips
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Offline tru

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Re: EEVblog #496 - What Is An FPGA?
« Reply #53 on: July 20, 2013, 08:28:01 pm »
Nice video Dave. Softcore CPU I think for a FPGA defeats the purpose of FPGA use.  What I understand (in real world terms) is that the FPGA is like a programmable DSP where you can process input signals with many operations all in parallel or due time before the signal changes, but a softcore CPU does things in sequence so one could (as many do) simply use an external ARM CPU with the FPGA.
The power comes from the combination of FPGAs and CPUs. In a complex system usually you have something like slow user input, controller logic, USB connection etc. Implementing this in a HDL is a waste of FPGA logic elements, because even for a simple USB device module you would need maybe a FPGA which costs $40 instead of $20 for the rest of your project, so just add an external $3 microcontroller with hardware USB and you are done.

For scanning slow user input and controlling the system, a soft core might be good for the same reason. Implementing all in a HDL means that you need logic elements for each function you want to implement, and all functions are available in parallel, driven by state machines, because there is no partial reconfiguration of the FPGA (at least not for the cheaper parts). Using a simple soft core like NIOS saves lots of logic elements. Then a NIOS program can configure the functions you've implemented in the FPGA. For example you could implement a VGA generator and a multichannel audio mixer (I've done both, AES3 as audio input/output, up to 192 kHz, 128 channels in parallel) in the FPGA, and a NIOS program implements the drawing functions in the framebuffer, reads the keys or a mouse and configures the routing matrix and mixing coefficients.
I see, good point, you're very right.  I didn't want newbies to be confused with the differences of what FPGA vs microcontroller or CPU can do, people here adding in softcore muddles the comparison I think.
 

Offline Salas

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Re: EEVblog #496 - What Is An FPGA?
« Reply #54 on: July 20, 2013, 08:45:19 pm »
Its nice how they emulate old computers on FPGA  :clap:

 

Offline FrankBuss

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Re: EEVblog #496 - What Is An FPGA?
« Reply #55 on: July 20, 2013, 09:00:56 pm »
Its nice how they emulate old computers on FPGA  :clap:


Cool old skool demos. It is not easy to implement a working Amiga, which plays demos correctly, because demo programmers used all the undocumented features of the hardware. Do you know that there is even a "making of" for the first "State of The Art" demo?
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Offline Salas

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Re: EEVblog #496 - What Is An FPGA?
« Reply #56 on: July 20, 2013, 09:19:02 pm »
Piece of history that video indeed. :-+
 

Offline free_electron

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Re: EEVblog #496 - What Is An FPGA?
« Reply #57 on: July 20, 2013, 09:30:04 pm »
ISE is a flaming pile of bug ridden crap, an amalgamation of separate software absorbed into the parent company over the past 10 years held together with duct tape. Even Xilinx reps admit it sucks.

Amen! I thought I hated working with FPGAs when we started working with Xilinx ones in school, but I'm using a Cyclone in a current project and the whole toolkit is a joy to work with.
third that !

the problem with xilinx is that they don't care. Their target is the medium ot large company that wants to use 'the beasts'. anyone playing at that level uses Synopsys as a frontend and uses the fusemapper as a backend. done. nobody in that playfield uses ISE.

Altera does care about the low end to mid range market as that is where their bread and butter is. so they differentiate by making good tools.
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Offline WarSim

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EEVblog #496 - What Is An FPGA?
« Reply #58 on: July 20, 2013, 09:32:17 pm »
Some pointers for people who want to start with FPGAs:
1. Simulators are extremely accurate in "post place and route" mode, enough to develop the entire project without programming a chip even once. So the only real reason to buy a board is to have that cool feeling when the first LED blinks on a real hardware.
2. There is an open-source simulator called iverilog (for Verilog only, obviously). It works on Win/MAC/Linux, really fast and easy to use. The benefit of using it on the initial stages is that it is possible to use your favorite IDE and not an IDE from the chip vendor, which are sort of slow and not all that great.

I am working in an area where FPGA etc is not an option, but for some of my own projects a small fabric based solution would be very helpful.  I have a little experience on the subject when GALs where new.  Currently I have been waiting for and looking for a viable option.
For home I have used almost every OS out there and over the decades have decided not to use Windows and have consolidated most of my computers to OS/X.  Frankly I prefer not to use my time managing an OS like I had to with MS, I prefer to just have the OS work with seldom management.  Before MS fanboys attack I am not interested in comparing credentials etc, I don't care how much you love your Winblows.  This is my choice, deal with it. 
So I have been waiting a long while waiting for an OS/X hosted fabric toolchain.  In the mean time I have been using other solutions like analog processing or PIC multi-processing.  The down side is some projects are a bit large.  No matter how you place then a dozen PICS take up allot of room. 
I have read the links to iverilog, it doesn't seem to be the entire tool chain.  Is there a complete tool chain for OS/X yet?  Better yet is there a FPGA or CPLD manufacturer that is working on an OS/X suite? 
 

Offline FrankBuss

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Re: EEVblog #496 - What Is An FPGA?
« Reply #59 on: July 20, 2013, 09:39:42 pm »
the problem with xilinx is that they don't care. Their target is the medium ot large company that wants to use 'the beasts'. anyone playing at that level uses Synopsys as a frontend and uses the fusemapper as a backend. done. nobody in that playfield uses ISE.

Altera does care about the low end to mid range market as that is where their bread and butter is. so they differentiate by making good tools.
Xilinx has some entry level FPGAs as well, like the Spartan series, with the Spartan 3 even cheaper than comparable Cyclone chips. But I agree, ISE is more difficult to use than Quartus and once I had even a crash in the fitter for a perfect valid design, which I could only fix by adding some dummy logic. Never had such a problem with Quartus.

But Quartus is also not bug free: once I had a problem where a state machine was synthesized wrongly. I needed some hours to verify that it was indeed a bug of the synthesizer, because usually you trust such tools more than your own code. But the Altera support was really good, they provided a hot-fix for it. Was an older Quartus version, something 6.x.
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Offline free_electron

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Re: EEVblog #496 - What Is An FPGA?
« Reply #60 on: July 20, 2013, 09:42:00 pm »
@warsim : in short: NOBODY. and nobody cares. Mac's are not for engineering. period. like it or not. that's the way it is.

plonk parallels on it load  winxp or win7 on it and get the toolchains. It's that or stay in the dark ages.

writing this on a 27 inch Mac...

i use MAC for anything web, photo , and some video.

Anything engineering ? windows... there's no escaping it.

and Lunix is not feasable either. There are toolchains for Atera and xilinx but its endless misery getting them to work right. you need distro xyz with library blablabla ... sneeze and you may break it. The linux version work perfectly fine in managed environments for very large projects where you do an exact install as per the tool manufacturers request ( mostly RHEL .. ).
For any other linux flavor: you are on your own. Fine if that is your liking to tinker more with the computer than be productive. 

i got FPGA's to program , not fidget with linux installs. i don't care about the Os. I care about getting the application up and running so i can be productive. Windows is still the easiest there.
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Offline c4757p

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Re: EEVblog #496 - What Is An FPGA?
« Reply #61 on: July 20, 2013, 09:48:44 pm »
For home I have used almost every OS out there and over the decades have decided not to use Windows
...
So I have been waiting a long while waiting for an OS/X hosted fabric toolchain.  In the mean time I have been using other solutions like analog processing or PIC multi-processing.  The down side is some projects are a bit large.  No matter how you place then a dozen PICS take up allot of room. 

Sorry, but that's just retarded. Stick Quartus/ISE/whatever in Parallels or dual-boot Windows or Linux. The amount of time you actually spend dealing with the software can be minimal. You don't need it to edit Verilog. You're going to try to use a dozen freaking PICs for parallel tasks because you don't like "Winblows"? I don't like it either but I can boot into it when I want to use my logic analyzer or universal programmer or any number of other things that require it. I just take one Benadryl for the allergic reaction and all is good :-+

@f_e, just my experience, but Quartus works a treat on the latest Debian with no effort.
« Last Edit: July 20, 2013, 09:50:35 pm by c4757p »
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Offline John Coloccia

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Re: EEVblog #496 - What Is An FPGA?
« Reply #62 on: July 20, 2013, 10:15:00 pm »
ISE is a flaming pile of bug ridden crap, an amalgamation of separate software absorbed into the parent company over the past 10 years held together with duct tape. Even Xilinx reps admit it sucks.

Amen! I thought I hated working with FPGAs when we started working with Xilinx ones in school, but I'm using a Cyclone in a current project and the whole toolkit is a joy to work with.
third that !

the problem with xilinx is that they don't care. Their target is the medium ot large company that wants to use 'the beasts'. anyone playing at that level uses Synopsys as a frontend and uses the fusemapper as a backend. done. nobody in that playfield uses ISE.

Altera does care about the low end to mid range market as that is where their bread and butter is. so they differentiate by making good tools.

That's not true.  I've worked with ISE and had great success, most recently at Northrop Grumman....which counts as "large", I believe.  Everyone complains about ISE, but I never found it to be particularly problematic.  A bit clunky, and perhaps a bit buggy, but certainly not the steaming pile of crap people are making it out to be.
 

Offline Alexei.Polkhanov

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Re: EEVblog #496 - What Is An FPGA?
« Reply #63 on: July 20, 2013, 10:21:09 pm »

always @(posedge CLK)
if (!CE) begin
    shifter[15:0] <= shifter{[14:0,MOSI};   // if CE is low : shift MOSI in to a shiftregister controlled by the CLK
end

...

always_comb begin
  case address[3:0]
    4'b0000 : char = char0;
   4'b0001 : char = char1;
 .. contine the decoder her for all 16 locations
end case
end
endmodule


You must have typed it faster than speed of light :-)
shifter[15:0] <= shifter{[14:0,MOSI};
should be
shifter[15:0] <= {shifter[14:0],MOSI};

also 'encase' is a single keyword. I just could not look at broken code even if it is just to give an idea. I am a programmer as you may noticed. >:D

Most importantly I see you are using 'always_comb' which is only available in Sytemverilog. I found support for Systemverilog in tools like Xilinx ISE and Altera Quartus is spotty and inconsistent. Synopsis is the only company who's tools support Systemverilog in full, but I know that only from rumors since I never used Synopsis tools myself.

I have read an article at EEE Spectrum magazine saying that FPGA developer skills will be one of the most sought after in coming years. Today I see only 2 (two) open positions related to FPGA in Toronto and they were there for ages, not sure if they are real. It did no became as popular as some anticipated. However use of FPGAs in sub millisecond stock trade systems and oil exploration had very impressive growth - they can afford it.
Despite all the progress in tools developing with FPGA still very hard and expensive. Once you have HDL code and try to run it you discover that it runs at 68MHz instead of expected 210MHz, why?!? to fix it you need to dig into 2000 pages of datasheets and app notes. You find things like synthesized RTL logic has too much fanout in one place screwing your timing, then simultaneous switching if too many cells causes problem in another part of device. Then you switch device or recompile and all problems are back but in different places... nice abstraction that tools promised to provide falls apart completely.


 

Offline Rasz

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Re: EEVblog #496 - What Is An FPGA?
« Reply #64 on: July 20, 2013, 10:46:08 pm »
I suspect that most engineers and most projects are not consumer projects and the cost of an FPGA is really not all that significant.  In fact, other than the work I'm doing now with my own business, I'd have to think hard if I EVER worked on a shrink wrapped consumer product, or even know anyone who has.  I believe the answer is no.  A friend of mine works for iRobot but he doesn't work on those cute little vacuum cleaners.

and here lies your problem, You suspect wrong. Market is all about optimization of cost. Altium bet on FPGAs taking over design, but FPGAs are expensive, and dedicated hardware will ALWAYS BE CHEAPER. Not to mention thanks to globalization its cheaper to hire 100 chinese/indian monkeys to code complete works of William Shakespeare than to pay living wage to 3 CS/EEs on staff.

There's a reason FPGA starts keep going up.  I can design one basic architecture with some basic IO on it, and then keep reusing that over and over and over and over again, just tweaking a bit here and there, adding a little here, removing a little there, etc etc.  You're stuck thinking about high volume production.  I'm starting to wonder if you understand how much engineering is done that DOESN'T target a high volume consumer market?

For the record, I'm not trying to be argumentative here.  There is just a huge amount of embedded engineering that is done where it doesn't matter one bit if a part cost $3 or $300.  It is completely and utterly dwarfed by a team of engineers, billing out at $100+ an hour, for 6 months.  Whatever gets you to the finish line soonest and with the greatest chance of success is by far the cheapest solution.

So what you are saying is FPGAs are perfecty for those one off projects where cost doesnt matter? Thank you for agreeing with me :D
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Offline ElectroIrradiator

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Re: EEVblog #496 - What Is An FPGA?
« Reply #65 on: July 20, 2013, 11:12:55 pm »
(Snip.)
Throw that at the little PIC or AVR and this is what will happen :
it will jump out of its socket , scamper to the far corner of your circuit board , roll over on it's back , curl up it's tiny little legs and simply die...

That comparison doesn't sound quite right?

It should be obvious that a $5 AVR or PIC 32 bit MCU isn't going to compare well to a Cyclone IV. If today your hobbyist FPGA setup is in the form of a $100 DE0-Nano board, then shouldn't you rather compare it to the likes of a *pair* of Beagle Bone Blacks, at $45 each, for computational and I/O power? A pair of those might still be far from adequate for your friend's nifty Flycatcher, but it is now a much more level playing field in the general case.

Similarly, if you are doing high end DSP work with a FPGA, then I would think your basis of a bang-for-the-bucks comparison should be some of TI's dedicated DSP CPUs? Last I checked, admittedly quite a while ago, those critters screamed through the stratosphere at hypersonic speed. What they lacked in the FPGA's parallelism, they made up for with GHz range clock frequencies and VLIW architecture.
 

Offline free_electron

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Re: EEVblog #496 - What Is An FPGA?
« Reply #66 on: July 20, 2013, 11:15:11 pm »

always @(posedge CLK)
if (!CE) begin
    shifter[15:0] <= shifter{[14:0,MOSI};   // if CE is low : shift MOSI in to a shiftregister controlled by the CLK
end

...

always_comb begin
  case address[3:0]
    4'b0000 : char = char0;
   4'b0001 : char = char1;
 .. contine the decoder her for all 16 locations
end case
end
endmodule


You must have typed it faster than speed of light :-)
shifter[15:0] <= shifter{[14:0,MOSI};
should be
shifter[15:0] <= {shifter[14:0],MOSI};

also 'encase' is a single keyword. I just could not look at broken code even if it is just to give an idea. I am a programmer as you may noticed. >:D

Most importantly I see you are using 'always_comb' which is only available in Sytemverilog. I found support for Systemverilog in tools like Xilinx ISE and Altera Quartus is spotty and inconsistent. Synopsis is the only company who's tools support Systemverilog in full, but I know that only from rumors since I never used Synopsis tools myself.

I have read an article at EEE Spectrum magazine saying that FPGA developer skills will be one of the most sought after in coming years. Today I see only 2 (two) open positions related to FPGA in Toronto and they were there for ages, not sure if they are real. It did no became as popular as some anticipated. However use of FPGAs in sub millisecond stock trade systems and oil exploration had very impressive growth - they can afford it.
Despite all the progress in tools developing with FPGA still very hard and expensive. Once you have HDL code and try to run it you discover that it runs at 68MHz instead of expected 210MHz, why?!? to fix it you need to dig into 2000 pages of datasheets and app notes. You find things like synthesized RTL logic has too much fanout in one place screwing your timing, then simultaneous switching if too many cells causes problem in another part of device. Then you switch device or recompile and all problems are back but in different places... nice abstraction that tools promised to provide falls apart completely.

Feel free ro correct typo's. i haven't sent the code throught the synth. My typing is very bad. Especially on an ipad. We need spellcheckers for verilog !

Quartus supports systemverilog constructs like always_comb , always_ff and always_latch. It also allows you to declare the reg and wire in the io block as opposed as having to rewrite it in the body.
Also the .notation for signal reference in instances is supported

I always use the systemverilog mode. Less typing, less typo's.

Anyway, the code demo i gave shows how you partition a task in manageable chunks , and the. How you write with a few lines what it needs to do. That display driver is a fairly large block of logic , yet the creation of it takes a few minutes if you are proficient at splitting a job in pieces and making the pieces. The coding itself is minimalistic. The synth does all the hard work.

That is the message i am tryingto convey: FPGA are not difficult (despite what dave claims). They are incredible fun and tremendously powerful. Don't be scared. All the 'fud' about timing closure, smoking chips, is just that. You will run i to that in very large designs. If you stay at speeds an order of magnitude below what the fpga can do you will never run into that.
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Offline free_electron

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Re: EEVblog #496 - What Is An FPGA?
« Reply #67 on: July 20, 2013, 11:21:14 pm »
(Snip.)
Throw that at the little PIC or AVR and this is what will happen :
it will jump out of its socket , scamper to the far corner of your circuit board , roll over on it's back , curl up it's tiny little legs and simply die...

That comparison doesn't sound quite right?

 of a *pair* of Beagle Bone Blacks, at $45 each, for computational and I/O power?

Your beaglebone couldnt even poll and drive its gpio fast enough to sample the ccd inthe given timeframe. You will need to bitbang the ccd access as it is nonstandard protocol. The moment the last sample is in you have one more clocktick to spit out the result .... Even that beagle bone will curl up like the wicked witch of the west and scream'i'm melting' while curling up its tail...

You cant do it with software. Simply because the number of instructions is so large and there is no time. The only option is hard logic doing it. That's what hard logic is for: to assist the cpu with things that simply take too much time. Offload that.

The people at Cray have figured that out long ago. Their supercomputers are a mix of fast cpu , gpu and fpgas. If something can be done extremely fast in hard logic they map the logic in.
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Offline WarSim

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EEVblog #496 - What Is An FPGA?
« Reply #68 on: July 20, 2013, 11:34:11 pm »
For home I have used almost every OS out there and over the decades have decided not to use Windows
...
So I have been waiting a long while waiting for an OS/X hosted fabric toolchain.  In the mean time I have been using other solutions like analog processing or PIC multi-processing.  The down side is some projects are a bit large.  No matter how you place then a dozen PICS take up allot of room. 

Sorry, but that's just retarded. Stick Quartus/ISE/whatever in Parallels or dual-boot Windows or Linux. The amount of time you actually spend dealing with the software can be minimal. You don't need it to edit Verilog. You're going to try to use a dozen freaking PICs for parallel tasks because you don't like "Winblows"? I don't like it either but I can boot into it when I want to use my logic analyzer or universal programmer or any number of other things that require it. I just take one Benadryl for the allergic reaction and all is good :-+

@f_e, just my experience, but Quartus works a treat on the latest Debian with no effort.
I have tried various virtual machines but not Parallels, dual boot is not an option for me. 
I have tried several took chains and none worked completely in any virtual machine. 
In the past I have purchased various Windows licences but all had issues with sharing with OS/X. 
I have one Win7 install, but now I know I have to bring it out of sleep 1hr before I need it for all the care it needs.  It is attached to my PCB mill and I have auto updates disabled but it does them anyway in the middle of jobs, if I don't spend the hour before hand.  Yes I have had several others attempt fixing this and several other issues, yes fresh installs have also been tried.  These are the quirky issues that I prefer not to deal with.  BTW I am talking about preference not a phobia, like you seemed to assume. 
This is the only area of EE that my preference has caused a limitation, I really don't consider it "retarded"
Besides none of these sharing options are officially supported and iffy if they will work.  Therefor requires at least a $400 risk.  Only way to find a working solution is response like your derogatory reply. 
BTW:  I used "dozen" as an example, using multiple uC or processors is not unusual.  The most uC was 18 and most of those where 6 pin PIC10s used as remote signal converters.  Even if I used FPGAs it would still require 6 due to location requirements. 

So, which version of Windows and Parallels works with Quartus and Lion?
 
 

Offline c4757p

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Re: EEVblog #496 - What Is An FPGA?
« Reply #69 on: July 20, 2013, 11:52:38 pm »
Why is dual boot not an option?

The auto-update glitch is a problem that nobody else has. PEBKAC. No idea why nobody else can figure it out, but I promise you, you have the same code on your Windows disc that I have, and it doesn't do that for me...

No idea which version of the software would work, but I've used Quartus in VirtualBox before and it worked fine, so I don't know why it's not working for you. Maybe some quirk these emulators have running on Mac? I don't know, I haven't had a Mac in years. Obviously running it in an emulator isn't an option if it doesn't work, but my experience hasn't shown that. Has this been a problem for anyone else?

Sorry, I didn't mean for my reply to be "derogatory", I was at least partially joking! The "Benadryl" comment wasn't meant to be sarcasm, it was a concession that Winblows indeed does blow. I just don't see why you can't use it once in a while...
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Offline ElectroIrradiator

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Re: EEVblog #496 - What Is An FPGA?
« Reply #70 on: July 21, 2013, 12:12:25 am »
You cant do it with software. (Snip.)

I already said as much in my previous reply, the BBB may very well not fit your friends purpose. I get it, OK? ;)

My point was that you should compare the FPGA to something like a BBB (or two!), not to a sub 100 MHz AVR or PIC MCU, when deciding what will or will not fit in a MCU/SoC.

The core of the AM3359 on the BBB runs at 1GHz, and the chip's EMIF can cope with 400 MHz DDR3 interfaces (800 MHz data rate). It is also able to drive a HDMI output (via a glue chip). I haven't tried to check how fast it can toggle it's GPIO pins, but it must be reasonably fast.

I am sure there are still many situations, where an FPGA would run rings around the BBB. However, the boundary for when you can bitbang an interface and process data in real time has been pushed dramatically farther out, compared to using a PIC or AVR.
 

Offline NiHaoMike

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Re: EEVblog #496 - What Is An FPGA?
« Reply #71 on: July 21, 2013, 12:35:09 am »
Why is dual boot not an option?
There is little need for it when there's VirtualBox, VMware, and other VM software. The main exception is when you need every bit of performance or when you're dealing with direct hardware access. Even then, there are hardware accelerated virtualization solutions, though I haven't really looked into them.

I have set up the Xilinx ISE to run on Gentoo. I can't remember the last time I started up my Windows XP VM, since Linux does everything I need it to do at home.

And yeah, mixed architecture is very often the way to go in complex projects. Since that involves using multiple IDEs at once, plenty of RAM and as many monitors as your PC can support are a good idea.
Cryptocurrency has taught me to love math and at the same time be baffled by it.

Cryptocurrency lesson 0: Altcoins and Bitcoin are not the same thing.
 

Offline WarSim

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EEVblog #496 - What Is An FPGA?
« Reply #72 on: July 21, 2013, 01:08:52 am »
Dual boot isn't an option due to how I setup my network.  I want to keep my security protocol but don't want to use LAPD. 
I just did an search throughout the web on the FPGA and CPLD world. 
Looks like the Quartus web is what I should try.  It's seems free but say XP/2000, hopefully it will work on Win7.  I don't want to buy another licence yet.  I also figured out an easy way the get my Win7 computer out of my mill for use.  Just can't use my PCB or 3d printer while I use Quartus Web.
Nice to see the packages are DIY friendly, all the TQFP are .5mm. 
Found a prices for the USB blaster was a bit dear, but found a MAX II CPLD dev kit for half the price that includes a USB blaster. 

In my wandering I also found some DIP CPLDs by Atmel are these any good or useful.
Any one want to recommend a low range FPGA dev kit, that uses this Quartus Web software?
 

Offline lgbeno

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EEVblog #496 - What Is An FPGA?
« Reply #73 on: July 21, 2013, 01:40:13 am »
Just get the de0 nano.
 

Offline Alexei.Polkhanov

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Re: EEVblog #496 - What Is An FPGA?
« Reply #74 on: July 21, 2013, 02:04:07 am »
Here is my CycloneIII prototype board that I made year and a half ago. I remember I cut my finger badly while trying to drill a hole in SMT adapter to connect bottom pad of the QFP to the ground. Whole bunch of decoupling caps soldered on other side (not shown). Chip in the corner is CPLD, MAX from Altera - I killed it by reprogramming too many times. Rainbow ribbon cable toing to ADC extension board that only works at 10-15MHz due to lack of bus transeivers and poor signal integrity.
Still I had much more fun with this design than with complete dev board - I can solder and un-solder things at will.
 


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