Author Topic: EEVblog #532 - Silicon Chip Wafer Fab Mailbag  (Read 51773 times)

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Offline senso

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #75 on: October 09, 2013, 11:24:58 pm »
Remenber that software like that is NOT like the arduino IDE, its just a little bit more advanced, with lots of code(and maths to simulate everything accurately)..
You are paying for a software that you can trust.
 

Offline moemoe

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #76 on: October 09, 2013, 11:35:29 pm »
https://github.com/maugsburger/
Breadboard Adapters featured in EEVBlog #573 on Tindie
 

Offline free_electron

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #77 on: October 10, 2013, 02:21:38 am »
that software is so expensive simply because there are only a few users in the world. They sell maybe a few hundred to a thousand licences... Developing that stuff is super expensive.
And you have programmers on duty. If we find a problem it gets tackled immediately.

Pirating is out of the question. At a certain point you need to hand off the design to a factory so it can be produced... the moment they read your data you would get caught. You can bet your money that stuff calls 'home'...

these licences are shared. there is all sorts of payment plans. per minute of runtime , per design , per number of users... you can pay weekly, monthly , half yearly and so. on.

you can turn on and of licences as you want. if work is slowing down and you don't need 6 simulation licences and can make do with 4 for a while you turn those unused 2 to non active for a couple of months. later you can reactivate them.

you also pay for special usage like sharing between sites. typically a licence is bound by geographical area. If we have available time and want to give people form france access to our farm you pay for that.

And a million dollars is only for 1 licence... Large silicon makers have a few hundred licences...
and then there is customization of the tools... you do not want to know what companies like IBM and Intel are paying for their custom build...

But all that stuff is irrelevant. This is top notch quality software. it has to work. If it produces output and a maskset is made to make a chip... a 18nm maskset ( those quartz plates with the pattern on em to expose the layers... there can be up to 50 different plates needed to make 1 chip . the collection of masks is called the maskset ) runs in the order of 10 to 12 million $ ...

If that software produces a mistake in the mask ... someone is going to have to 'eat' that... and it has happened !
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Offline Zbig

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #78 on: October 10, 2013, 02:37:02 am »
[..]
Someone mentioned invar as a material with low thermal expansion. Another material used in semiconductor industries is Zerodur, thermal expansion close to zero. Quite cool stuff. [..]

Yes, but it can also be a lukewarm or hot stuff and it still doesn't care! How cool is that! ;)

« Last Edit: October 10, 2013, 04:12:59 am by Zbig »
 

Offline Sionyn

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #79 on: October 10, 2013, 06:54:47 am »
awesome free electron and dave should take a trip round your foundry
eecs guy
 

Online Monkeh

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #80 on: October 10, 2013, 06:55:47 am »
At least until they charge a reasonable price, eg $100 for lifetime use of per version of the software, or if it needs frequent updating, then $30 a month or something?

What on earth are you smoking?

$100 for lifetime use? $30 a month? How are the programmers going to get paid? There are not millions of users of this sort of software.
 

Offline mamalala

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #81 on: October 10, 2013, 07:17:42 am »
Pirating is out of the question. At a certain point you need to hand off the design to a factory so it can be produced... the moment they read your data you would get caught. You can bet your money that stuff calls 'home'...

While pretty much unrelated, the CadSoft folks deserve some credit for how they implemented their protection for Eagle. You can crack the software rather easily. However, they are very quick to blacklist such cracks. The result is that only the cracked version can open the files made with it. Everyone else gets a subtle error message.... No need for calling home stuff in this instance.

But yes, i agree, it would be rather silly to try and use any illegal copy of such a sophisticated software like the ones used to make wafer "layouts". The risk is simply too high compared to the cost of everything else.

Greetings,

Chris
 

Offline marshallh

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #82 on: October 10, 2013, 07:18:55 am »
Found a picture of Altera's 20nm serdes characterization jig, with similar BGA socket seen in the video.

Verilog tips
BGA soldering intro

11:37 <@ktemkin> c4757p: marshall has transcended communications media
11:37 <@ktemkin> He speaks protocols directly.
 

Offline RupertGo

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #83 on: October 10, 2013, 10:46:40 am »
That is a truly awesome mailbag - and video.

I've been on a couple of fab tours, but they're much rarer than they used to be. Companies are also much more leery about handing out wafers, so I'm most impressed that you got that consignment; I used to be able to get stuff for demos and talks just by asking for them from Intel, but now even their own marketing and PR lot can't get hold of them - in general. You can pick up wafers on eBay from time to time, but I'm never quite sure where they come from and they don't seem to come with much information. Best freebie I ever had was when I visited Rockwell in the glory days of dial-up modems; they gave me and the rest of the journos a wafer full of DSPs with a clock mounted in the middle. Got shattered in the office when some damn fools were chucking a ball about.

Although cameras are very restricted on fab tours, here's one of my favourite pictures from one of Intel's Israeli fabs - http://www.flickr.com/photos/onaliencinema/83541192/#. Got into a lot of trouble on that one as I obtained (entirely legitimately) a yield graph with real numbers on it. No matter that it was for an obsolete process from years previously: you have never seen an entire company lose its sense of humour as quickly as when we printed that. That and the questions we asked about the new fab being built on what was, even by Israeli standards, land that still belonged to the Palestinians with the paperwork to prove it. But that, as they say, is a whole 'nother story. When one company provides a few percent of a country's GDP...

One of the tours I did was when copper was just being introduced, and the internal procedures to make sure you didn't get cross-contamination were insane. As they had to be; if your line gets poisoned the costs (as has been said) are horrendous, and it really doesn't take much.

A thing not in the mailbag but that impressed me when I saw it is a diamond heatsink. Diamond has good thermal conductivity, and there are tests you can do on working chips to characterise the operational parameters of transistors that involve scanning the circuitry with a laser. How do you do that on a running chip that's dissipating maybe 100 watts? You can't just run up a bare die - so, diamond heatsink. It's surprisingly cheap, I was told, especially by fab standards, maybe a couple of thousand dollars, as industrial diamond technology is much cheaper than the (entirely artificial) jewellery market. But how cool (sorry) is that...

 

Offline TNb

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #84 on: October 10, 2013, 12:16:27 pm »
I'm quite surprised by this big circle testing cartridge Dave showed in vid, but still - are you 100% sure that wiring is hand made?
I mean, the possibility of human-related error in this is soooooooo ungodly high, it's seems very unlikely it is done by human. Just imagine if you did all that wiring and then something doesn't work the way it needs, you will lose another month or two finding out where is the problem...
Does anybody know more about this stuff? Is it really something like 400 hand-welded pins? O_O
 

Offline free_electron

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #85 on: October 10, 2013, 01:29:36 pm »
Yes. fully handmade.

The way they build these things is using a split vision system. they have the actual pattern at right scale of where the needles need to go. They use a UV curable resin.
The needles are ready made and the tip bent as well as the tail spot-welded on. So they just need to pick one depending on the current and the layer they are working on. there is only 6 or 7 different ones.

they apply a bit of resin , clamp the needle in a micromanipulator, position it correctly. At this point the tail of the needle already sits in the resin. they expose it to uv for a few seconds, the resin hardens and the needle is set.
Then the sleeve is slid over the bare wire , cut to length and the wire is soldered to the correct dot on the interface board. another dab of resin and a shot of UV sets that. Next needle.

When all is done they put a jig over the assembly and then fill that with the black resin you see around the needles. the whole thing then goes in a vacuum chamber to pull out any air bubbles in the black resin. Once that has hardened the fixture is ready.

We have (had ?) people in house that can do quickie prototypes of these. By the time the first prototype chips come out of the fab we have one of these for testing. once we go in production then the adapters get ordered from a subcontractor. I've seen them build these ( simpler ones for 44 pin devices ) in 1994 when i was working in the fab.
I donlt know if they still build them in house.. probably not.
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Offline elCap

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #86 on: October 10, 2013, 01:53:40 pm »
[..]
Someone mentioned invar as a material with low thermal expansion. Another material used in semiconductor industries is Zerodur, thermal expansion close to zero. Quite cool stuff. [..]

Yes, but it can also be a lukewarm or hot stuff and it still doesn't care! How cool is that! ;)
And it can even be the same piece of Zerodur! Hot in one end and cool in the other, still don't care much.


As for semicon software:
There are actually free sw available. A few examples: http://www.staticfreesoft.com/index.html , http://www.peardrop.co.uk/glade/
But they are probably not used to make an Intel i7 processor.. more for testing, education, and simple chips.
Then there are a few nice viewers available for free, for instance EBV viewer by Nippon Control Systems (http://www.nippon-control-system.co.jp/en/index.html) I lost the download page, they have no link to it on their webpage so have to contact them. It can even plot gerbers.
« Last Edit: October 10, 2013, 01:56:38 pm by elCap »
 

Offline Goophy629

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #87 on: October 10, 2013, 03:39:51 pm »
wondering how the messy circuit is actually "printed" on the the flat disk then cut into pieces sold for hundreds bucks like a computer cpu |O

awesome video indeed

any high quality pictures this time? :-+
 

Offline EvilGeniusSkis

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #88 on: October 10, 2013, 04:48:28 pm »
Great stuff, thanks Dave and Vincent! It's always amazing to see how the magic happens.
Also those nanometer probes, I guess, you cannot even breathe on it, or it will bend  :-DD :scared:

I had a question tho, is there any widely available solvent or chemical which can be used to remove/dissolve package epoxy of usual chip packages? I like taking photos of electronic gear, and tried couple ways to get die shots, but either shatter die or it gets badly damaged when trying remove epoxy mechanically. I have some dead modern CPUs and GPUs, which might be interesting to look at (lots actually, even some latest multi-billion transistor count chips) :)

Best one so far is nvidia geforce4 Ti4200 GPU die shot, which i got off it's BGA package by heating it and cracking open.
Pity it's covered with metal mask in front, so cannot see inner layers beauty.

take a propane torch to the IC until the black plastic turns white. it will then be extremely brittle.
here's a video:
 

Offline eripaha

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #89 on: October 10, 2013, 06:16:50 pm »
Its wonderful to see this stuff explained. I dont think i would have ever even known about this stuff if dave did not make a video about these.
 

Offline Stonent

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #90 on: October 10, 2013, 08:56:36 pm »
The larger the government, the smaller the citizen.
 

Offline Stonent

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #91 on: October 10, 2013, 09:19:18 pm »
If a company is going to charge over a million dollars a year for software, won't companies designing these IC's just pirate the software, or weigh the cost of purchasing a license to the software, to the cost of just allocating a few of their programmers to try and crack the software?

At least until they charge a reasonable price, eg $100 for lifetime use of per version of the software, or if it needs frequent updating, then $30 a month or something?

You do realize what kind of a colossal lawsuit would ensue after a thing like that?  :palm:
If you have a market that has very few players, than practically no secret can be held for long.

Also you basically can't pirate software like that you typically have a license key server that validates each copy or in some cases a dongle with and encrypted code on it. I have seen lost dongles cost 5 figures to be replaced on some programs (z max)

Also when I worked at a company that made laser eye surgery equipment they had all sorts of strange financing options so that new doctors could afford high end equipment. So one plan would be that at the end of every month the laser would call home and upload how many surgeries have been done and basically the doctor would have to give 75% of the cost of profit back as payment and have to buy custom packed surgery kits from our company for X months or years until it is paid for. Etc.

So yeah he may be driving an s class Mercedes but it is leased and he is living on peanut butter sandwiches until that's paid for.

Again same with high end software. They can charge per use, per hour, per minute.

« Last Edit: October 10, 2013, 09:31:12 pm by Stonent »
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Offline SArepairman

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #92 on: October 10, 2013, 10:02:13 pm »
is it really that hard to crack?

can someone upload a copy?  :box:
 

Offline tized

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #93 on: October 10, 2013, 10:26:13 pm »
is it really that hard to crack?

can someone upload a copy?  :box:

Not really, they use the flexlm licensing manager which has been cracked many times before. Probably, if looking in the right corners of the Internet, you could find that software, as students use it to learn the tools of the trade. But no company, self-respecting or otherwise, will dare to use pirated software, this is a very IP sensitive industry.
It would be very entertaining to see someone trying to submit GDS files to TSMC from a cracked Cadence suit. Just tell me before so I can prepare the popcorn...
 

Offline elgonzo

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #94 on: October 11, 2013, 12:58:19 am »
@free_electron and all the others, thanks for the insights into the "secret world" of chip production.  :-+
I haven't seen Dave's video yet, but after seeing Dave's bunny suit dance :-DD i decided to watch Dave's mailbag video as my today's evening prime time programme  :clap:
« Last Edit: October 11, 2013, 01:06:10 am by elgonzo »
 

Offline kphannan

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #95 on: October 11, 2013, 01:12:13 am »
Great mailbag.  I never worked in fab, but got to dabble a bit in college.  Design work was done on Apollo workstations then paper tape to lithography..... Boy those were the days.
 

Offline brabus

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #96 on: October 11, 2013, 01:17:32 am »
REALLY COOL Mailbag, I watched the video never shutting my eyes. :-+

is it really that hard to crack?

can someone upload a copy?  :box:

I don't understand what's the deal with cracking such a software.

Let me explain the point with an example from my job.
I am using a very particular software, used in the automotive industry, to deal with xCU datasets.
It is sold with pretty expensive licenses, but... there is no crack at all! No serial code, no passwords, nothing at all.

You can just install it on your desktop PC and work with it.

What's the point?
Well... On the very first time you try to use some reworked files (flashing them into the ECU of someone's car, in exchange of little money), someone will eventually know that you used that cracked software.
It's like farting in a elevator, except for the fact that you make a very loud and clear noise all over the world.
You would be immediately identified, and you would not only be sued and lose (all your) money, but also marked forever with the sign of dishonesty. You are OUT of business, forever.

Some "worlds" (e.g. automotive, silicon, racing, power, ...) are VERY small, everyone knows everyone, so it's pretty impossible to obtain any benefit from a cracked software.

It's like stealing the Cullinan diamond and then sell it on ebay with your name, address, personal photo and GPS position of your house, waiting with your pants down. ;D

http://en.wikipedia.org/wiki/Cullinan_Diamond
« Last Edit: October 11, 2013, 01:24:41 am by brabus »
 

Offline just_fib_it

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #97 on: October 11, 2013, 03:55:04 am »
Wafers are cut whit a mechanical saw? is that real?

As free_electron said, mechanical sawing is one way of dicing. However, laser dicing offers thinner cuts and therefore less wasted wafer space. Where I work we mostly make very small microcontrollers (think tens of thousands of dies on a wafer), so hundreds of cuts are needed in both directions. Even with a very thin saw blade the losses with mechanical sawing would add up quickly.
 

Offline elgonzo

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #98 on: October 11, 2013, 04:04:41 am »
image of a tester : http://www.teradyne.com/pressRoom/images/UltraFLEX-HD.tif (warning ; 43 megabyte file ! )
that testhead holds 1 chip under test ! if you ook inbetween the operator's arms you see the large plumbing fixtures that pipe liquid nitrogen into the head.. the chip is actually cycled , cold ( -30 degrees , ambient , 25 and hot (125) )

Vincent, do you know by chance why the head unit of the machine is rotatable around an horizontal axis?

The upside-down logo on the lower part of the front panel of the rotating unit indicates that it is 'normal' for the unit to operate in 180 degree orientation. My guess would be to either support two different chip designs alternately/subsequently without requiring down-time for swapping the test head, or to double throughput by using two test heads simultaneously.

 

Offline elgonzo

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Re: EEVblog #532 - Silicon Chip Wafer Fab Mailbag
« Reply #99 on: October 11, 2013, 04:13:00 am »
Wafers are cut whit a mechanical saw? is that real?

As free_electron said, mechanical sawing is one way of dicing. However, laser dicing offers thinner cuts and therefore less wasted wafer space. Where I work we mostly make very small microcontrollers (think tens of thousands of dies on a wafer), so hundreds of cuts are needed in both directions. Even with a very thin saw blade the losses with mechanical sawing would add up quickly.

And not to forget: Stealth dicing - laser cutting wafers from within. That sound so strange that it is hard to believe. But it is actually true .
 


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