Author Topic: EEVblog #552 - DFM Automated PCB Panel Testing  (Read 16523 times)

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Offline EEVblog

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EEVblog #552 - DFM Automated PCB Panel Testing
« on: November 29, 2013, 09:02:46 am »
Dave demonstrates how to add testing capabilities to your PCB panel for easier production testing. Using an example of his new uCurrent design, and also a commercial product designed to be automatically ATE tested.
Essentially Part 3 of the PCB Design For Manufacture series.
PCB DFM Part1:
PCB DFM Part2:
uCurrent Test Jig:
Testing uCurrents:

! Private video
« Last Edit: November 29, 2013, 09:32:11 am by EEVblog »
 

Offline poorchava

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #1 on: November 29, 2013, 09:18:41 am »
"this video is private"
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Offline JoannaK

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #2 on: November 29, 2013, 09:19:16 am »
Video #552 is Private..  :-//
 

Offline jancumps

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #3 on: November 29, 2013, 10:47:01 am »
I could watch it.
 

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #4 on: November 29, 2013, 10:57:55 am »
Thanks for the video Dave.

Question: Why not use pogo pin mated with test points instead of the connector on the panel? It's cheaper per panel (exactly 0.00 per panel), does the same job. You can then make a quick, small test connector with pogo pins that mates with it. Or some such.

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Offline qoole

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #5 on: November 29, 2013, 11:06:20 am »
According to your circuit diagram your -IIN (J2) is directly linked to your -V output (J4) so that means you only really need 5 test connectors as the ground is common. (Shame it can't be shared with the battery as then you'd only need 4 connectors) So if you were to sacrifice one tiny piece of top-side real-estate with a tiny via in the corner or if you chance it and try to make two traces fit you could make an ENTIRELY automated test rig. Failing that the other up side is it would mean the person doing the testing would only need to plug one banana plug into the +IIN connector.
 

Offline sivalley

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #6 on: November 29, 2013, 11:30:04 am »
I had a bit of a derp and didn't wait the whole video through before posting a comment so I'll copy-pasta it here now:
Silly passing thought looking at your schematic and routing limitations and I thought I'd toss in my two cents:

Ideally it looks like you could knock down your test connections to 5 points and with a little clever cover make it not destroy the top surface continuity.

Mandatory traces on the bottom side for input positive, output positive, battery positive, and battery negative leaving no trace pairs along the ear to short out.

The trick for I/O negative; since they are tied together and looks like they are your flood plane on the top side would be to flood it "out" across all 10 units and viola!  You can test all ten simultaneously after all.  Of course this might be an issue when it comes to the routing since it might leave a nasty copper edge.  I have no idea if your manufacturer can run a 90 degree bevel for the routing cut to leave a cleaner edge if you flood the whole top surface.

Final connection could be accomplished with a 24 pin (20 I/O positive pairs, 1 I/O common negative, 2 battery +/-, 1 NC key pin) IDC header since you obviously don't want to parallel all those sense inputs or device outputs. ;)?
 

Offline mikeselectricstuff

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #7 on: November 29, 2013, 11:32:25 am »
Thanks for the video Dave.

Question: Why not use pogo pin mated with test points instead of the connector on the panel? It's cheaper per panel (exactly 0.00 per panel), does the same job. You can then make a quick, small test connector with pogo pins that mates with it. Or some such.

An Edge connector would be a more universal solution - you can use pogo pins or an edge connector - as you probably don't need a full-size testbed, a clip-on edge con on a cable is probably the better solution.
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Offline EEVblog

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #8 on: November 29, 2013, 12:39:03 pm »
Question: Why not use pogo pin mated with test points instead of the connector on the panel? It's cheaper per panel (exactly 0.00 per panel), does the same job. You can then make a quick, small test connector with pogo pins that mates with it. Or some such.

Yes, I may not actually use a connector, it was just the most convenient footprint to put down in a hurry.
 

Offline Isaac

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #9 on: November 29, 2013, 01:35:41 pm »
Hi, Dave,

I really enjoy the DFM episodes and I'm sure others do too. Why don't you make a series of videos about DFM, with not only the DFM itself, but with related stuff as well like industry stories, more visits to manufacturing houses and etc. I'm sure some manufacturing houses would love the advertising in australia and in other places since your vlog is seen by lots of Hackers, Makers and students and professional engeneers out there.

 

Offline peter.mitchell

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #10 on: November 29, 2013, 01:43:39 pm »
I'm curious of this, as the routing isn't precise, and it is just for test connections, what are the downsides of using a very wide track that will inevitably be slightly routed into, but at least never be fully cut (and of course, the 2 track variant too). What are the chances that the routing tool will tear the copper? I understand on things with metal housings this may be an issue because of exposed edge copper, and on the top layer it would be visible, but since this is the bottom layer?

If you're not sure of my explanation, this image may help; https://dl.dropboxusercontent.com/u/677635/explanation%20device.bmp
 

Offline cidcorp

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #11 on: November 29, 2013, 01:59:49 pm »

I was going to ask about using pogo pins as well.  As it stands would this require you to solder a single row header on each panel?  Not something I'd want to do on each panel.  At least with the edge connector contacts there is no additional step - simply slide in and test.

If you are limited to 4 contacts coming from the board you could make the power connection simple bare contacts on the bottom of each board, giving you full use of the 4 corner traces.  Then you apply power to each board one at a time marking pass or fail.

Also with peters idea, assuming the copper 'munching' won't damage the routing bit, you could get 8 traces out of each board, 2 per corner and not have to worry about anything.

This is an awesome series of video - keep them up.

Chris
 

Offline peter.mitchell

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #12 on: November 29, 2013, 02:05:42 pm »
Also with peters idea, assuming the copper 'munching' won't damage the routing bit, you could get 8 traces out of each board, 2 per corner and not have to worry about anything.

I'm not worried about the routing bit, copper is soft compared to the harsh abrasive that is fibre glass. I'm more about whether the routing bit will tear the thin layer of copper from the board.
 

Offline owiecc

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #13 on: November 29, 2013, 02:32:55 pm »
Very nice silkscreen on that first board (3:00). There is a matrix of pads and some external ones have nice labels attached (GND, 1V2, GND, 1V8). How did you do these labels? Plugin for Altium or a custom component?
 

Offline TheEPROM9

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #14 on: November 29, 2013, 02:34:56 pm »
Dam right about the YouTube comments system. :rant:

Rather clever solutions to what is a complex problem. What automated logic are you going to put on the test jig PCB, thus how automated will it be?
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Offline cthree

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #15 on: November 29, 2013, 03:43:01 pm »
Dave, have you considered using compression type board-to-board connectors like this one from AVX? http://www.digikey.ca/product-detail/en/009258008004062/478-5494-6-ND/2024974

It would require nothing but a simple footprint on the DUT and could be activated by simply pressing the panel down on the test jig. SAMTEC makes some which allow for as much as 10mm between boards. I would think 4 pins to align the panel with the holes in the corners of the panel and them simply press it down. Pogo pins seem like a lot more work and would require a more complicated jig.
 

Offline free_electron

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #16 on: November 29, 2013, 04:16:06 pm »
Samtec has pogo clusters. Samtec pcp series.

All you need on the board is landing pads.

The carrier card would have a pogo cluster and off you go.
You could make a big carrier that can hold the entire panel and test all 10 at the same time. Hoom up a 34970 and the keithley current source, make a small testprogram in vb controlling both machines over a usb to rs232 link and bingo. No flicking switches, no nothing.
Youd need a relay card and a multiplexer card.
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Offline mcinque

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #17 on: November 29, 2013, 06:38:06 pm »
Very nice idea!! thx for sharing!
I'm basically still a rookie and because of this, even with the best intentions, I often say bullshits
 

Offline ion

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #18 on: November 29, 2013, 07:53:50 pm »
Quote
... I may only be manufacturing a couple of thousand of these things...

So you won't be crowd funding these?
 

Offline manu

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #19 on: November 29, 2013, 09:38:40 pm »
Hello,

I'm a big fan of test jigs and I would suggest a standard .1" right angle connector rather than, as other subscribers said, pogo pins which are difficult to mount mecanically on a board (in my opinion).
You can make the right angle connector removable from your panel if you misalign alternatively each of the pin on the panel, so as JP3 on the chipkit uno32 board (this connector is used to plug a PICkit2 or PICkit3).

Misalignment allows the connector to be held in place (temporarily, during the test session) and making quite good contact without soldering it.

If you also do that on your test jig, you can have a replacable connector (without soldering!) you can swap it with a new one after some uses.

It's a little thing but it prevents you to solder a connector each time you have to test a panel.
 

Offline arildj78

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #20 on: November 29, 2013, 10:22:23 pm »
At 28:36 we can see the test traces coming into the board. Is there a reason to bring the trace a few millimeters into the board, before bringing it out towards the edge again?

Arild
 

Offline sergey

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #21 on: November 29, 2013, 10:23:49 pm »
Cool video, thanks for it!

The question tho. Top layer is connected to "virtual" ground which is also connected to "-" banana jacks. Now. why not to use 4 bottom corners to trace positive power, current input, voltage output and route ground connection from the top layer? You wouldn't need vias for this and you might add connections to all 4 corners on the top level just for symmetrical look.

Or you think it also breaks look-and-feel?
 

Offline steve_w

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #22 on: November 30, 2013, 12:22:24 am »
Thanks Dave,

Most informative, love your work.

regards

Steve_W
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Offline nitro2k01

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #23 on: November 30, 2013, 01:13:55 am »
Cool video, thanks for it!

The question tho. Top layer is connected to "virtual" ground which is also connected to "-" banana jacks. Now. why not to use 4 bottom corners to trace positive power, current input, voltage output and route ground connection from the top layer? You wouldn't need vias for this and you might add connections to all 4 corners on the top level just for symmetrical look.

Or you think it also breaks look-and-feel?
I thought about this too. I think the big reason is that you would ideally need 10 separate test current srouces per panel.  A different option would be to use a single current source in parallel for all the boards and rely on the parallel resistance of the shunts to divide the current equally, but that's a bit crusty and just asking for trouble.
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Offline JerTheSmartAlek

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Re: EEVblog #552 - DFM Automated PCB Panel Testing
« Reply #24 on: November 30, 2013, 02:29:02 am »
I really want to see a quick little demonstration of your test system, perhaps also with a quick use of the old test method for comparison, maybe as a little benchmarking? I dunno, I just really love it when we see you doing board design.
 


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